diff options
author | Andrew Trick <atrick@apple.com> | 2012-04-24 17:56:43 +0000 |
---|---|---|
committer | Andrew Trick <atrick@apple.com> | 2012-04-24 17:56:43 +0000 |
commit | 006e1abf76148626fb38de1b643c2d31de7f08a7 (patch) | |
tree | d6a2d36b8cc936af54ace586bbdcc14eb0bc106d /include/llvm/CodeGen | |
parent | 4dfeef100d940a0c1ca22055dcb29b02a4848f65 (diff) |
misched: DAG builder support for tracking register pressure within the current scheduling region.
The DAG builder is a convenient place to do it. Hopefully this is more
efficient than a separate traversal over the same region.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155456 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen')
-rw-r--r-- | include/llvm/CodeGen/MachineScheduler.h | 6 | ||||
-rw-r--r-- | include/llvm/CodeGen/ScheduleDAGInstrs.h | 3 |
2 files changed, 7 insertions, 2 deletions
diff --git a/include/llvm/CodeGen/MachineScheduler.h b/include/llvm/CodeGen/MachineScheduler.h index 474c95dfef15..a7ed0bd7331d 100644 --- a/include/llvm/CodeGen/MachineScheduler.h +++ b/include/llvm/CodeGen/MachineScheduler.h @@ -27,6 +27,7 @@ #ifndef MACHINESCHEDULER_H #define MACHINESCHEDULER_H +#include "RegisterClassInfo.h" #include "llvm/CodeGen/MachinePassRegistry.h" namespace llvm { @@ -47,7 +48,10 @@ struct MachineSchedContext { AliasAnalysis *AA; LiveIntervals *LIS; - MachineSchedContext(): MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {} + RegisterClassInfo RegClassInfo; + + MachineSchedContext(): + MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {} }; /// MachineSchedRegistry provides a selection of available machine instruction diff --git a/include/llvm/CodeGen/ScheduleDAGInstrs.h b/include/llvm/CodeGen/ScheduleDAGInstrs.h index 766c9b2f5691..dcf72c794189 100644 --- a/include/llvm/CodeGen/ScheduleDAGInstrs.h +++ b/include/llvm/CodeGen/ScheduleDAGInstrs.h @@ -28,6 +28,7 @@ namespace llvm { class MachineLoopInfo; class MachineDominatorTree; class LiveIntervals; + class RegPressureTracker; /// LoopDependencies - This class analyzes loop-oriented register /// dependencies, which are used to guide scheduling decisions. @@ -275,7 +276,7 @@ namespace llvm { /// buildSchedGraph - Build SUnits from the MachineBasicBlock that we are /// input. - void buildSchedGraph(AliasAnalysis *AA); + void buildSchedGraph(AliasAnalysis *AA, RegPressureTracker *RPTracker = 0); /// addSchedBarrierDeps - Add dependencies from instructions in the current /// list of instructions being scheduled to scheduling barrier. We want to |