diff options
| author | Dale Johannesen <dalej@apple.com> | 2008-09-20 02:03:04 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2008-09-20 02:03:04 +0000 |
| commit | 9af7b3daec41c994b6d78a5b029ab094f03229fe (patch) | |
| tree | 0c8e69cd2040bc902aae365e9861a9421cc60152 /llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | bc15d8539dbd48d69eb441107262ad81fc0f69ca (diff) | |
Teach coalescer about earlyclobber bits.
Check bits for preferred register.
llvm-svn: 56384
Diffstat (limited to 'llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp index 33061890c095..88996575db86 100644 --- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1206,6 +1206,14 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { DOUT << " and "; DstInt.print(DOUT, tri_); DOUT << ": "; + // If one interval is earlyclobber and the other is overlaps-earlyclobber, + // we cannot coalesce them. + if ((SrcInt.isEarlyClobber && DstInt.overlapsEarlyClobber) || + (DstInt.isEarlyClobber && SrcInt.overlapsEarlyClobber)) { + DOUT << "\t\tCannot join due to earlyclobber."; + return false; + } + // Check if it is necessary to propagate "isDead" property. if (!isExtSubReg && !isInsSubReg) { MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg, false); @@ -1366,6 +1374,10 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) { if (TargetRegisterInfo::isVirtualRegister(DstReg)) RemoveUnnecessaryKills(DstReg, *ResDstInt); + // Merge the earlyclobber bits. + ResDstInt->isEarlyClobber |= ResSrcInt->isEarlyClobber; + ResDstInt->overlapsEarlyClobber |= ResSrcInt->overlapsEarlyClobber; + if (isInsSubReg) // Avoid: // r1024 = op |