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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-06-27 15:39:19 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-06-27 15:39:19 +0000 |
| commit | 817cbdeae602d97bb8e8c45d9eaa34a9d6f2e6cf (patch) | |
| tree | 12ec47de00cc4cdff880a020b9cb200d88130705 /test/MC/Mips/mips32 | |
| parent | b9fec3eb617427a77d2b73fd962e90bb4b5d734f (diff) | |
[mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.
Summary:
Previously it (incorrectly) used GPR's.
Patch by Simon Dardis. A couple small corrections by myself.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10567
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240883 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips/mips32')
| -rw-r--r-- | test/MC/Mips/mips32/valid.s | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/MC/Mips/mips32/valid.s b/test/MC/Mips/mips32/valid.s index 3765044339c9..fbe1551f6c26 100644 --- a/test/MC/Mips/mips32/valid.s +++ b/test/MC/Mips/mips32/valid.s @@ -89,7 +89,7 @@ a: madd $zero,$9 maddu $s3,$gp maddu $24,$s2 - mfc0 $a2,$14,1 + mfc0 $8,$15,1 # CHECK: mfc0 $8, $15, 1 # encoding: [0x40,0x08,0x78,0x01] mfc1 $a3,$f27 mfhi $s3 mfhi $sp @@ -112,7 +112,7 @@ a: movz.s $f25,$f7,$v1 msub $s7,$k1 msubu $15,$a1 - mtc0 $9,$29,3 + mtc0 $9,$15,1 # CHECK: mtc0 $9, $15, 1 # encoding: [0x40,0x89,0x78,0x01] mtc1 $s8,$f9 mthi $s1 mtlo $sp |