diff options
| author | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-03-17 13:17:44 +0000 |
|---|---|---|
| committer | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-03-17 13:17:44 +0000 |
| commit | f28b151b5232accbbc4e97a5bb25fb66dd5f18d7 (patch) | |
| tree | e846dc6c49a49eb6a17b65f7820191762615352e /test/MC/Mips/mips32 | |
| parent | 03b47b8e5b9042fe0715aa62ff8ed8c2ca2c39ce (diff) | |
[mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction.
Summary:
This adds a MipsInstAlias which expands to XORi $reg,$reg,imm. For example, "xor $6, 0x3A" should be expanded to "xori $6, $6, 58".
This should work for all MIPS ISAs.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D8284
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232473 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips/mips32')
| -rw-r--r-- | test/MC/Mips/mips32/valid.s | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/test/MC/Mips/mips32/valid.s b/test/MC/Mips/mips32/valid.s index d79c390c47ec..ba75d77e746e 100644 --- a/test/MC/Mips/mips32/valid.s +++ b/test/MC/Mips/mips32/valid.s @@ -195,3 +195,4 @@ trunc.w.d $f22,$f15 trunc.w.s $f28,$f30 xor $s2,$a0,$s8 + xor $2, 4 # CHECK: xori $2, $2, 4 # encoding: [0x38,0x42,0x00,0x04] |