diff options
| author | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2016-07-11 07:41:56 +0000 |
|---|---|---|
| committer | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2016-07-11 07:41:56 +0000 |
| commit | 279cd1ed0bc42d2ccbb1d4ef8ecdd1c41b5e7a5e (patch) | |
| tree | b62b398ad85fce85bc3f46a147b1568334617561 /test/MC/Mips/target-soft-float.s | |
| parent | 02c0f025fea67d2b75f61a51a7343f9825c55597 (diff) | |
[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support
Differential Revision: http://reviews.llvm.org/D18824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275050 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips/target-soft-float.s')
| -rw-r--r-- | test/MC/Mips/target-soft-float.s | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/MC/Mips/target-soft-float.s b/test/MC/Mips/target-soft-float.s index 5865d5ab1269..f532cdf2ed97 100644 --- a/test/MC/Mips/target-soft-float.s +++ b/test/MC/Mips/target-soft-float.s @@ -269,10 +269,10 @@ foo: # 32: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled ldc1 $f2, 16($7) # FIXME: LDC1 is correctly rejected but the wrong error message is emitted. - # 32: :[[@LINE-2]]:19: error: invalid operand for instruction + # 32: :[[@LINE-2]]:19: error: expected memory with 16-bit signed offset lwc1 $f2, 16($7) # FIXME: LWC1 is correctly rejected but the wrong error message is emitted. - # 32: :[[@LINE-2]]:19: error: invalid operand for instruction + # 32: :[[@LINE-2]]:19: error: expected memory with 16-bit signed offset madd.s $f2, $f2, $f2, $f2 # 32: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled mfc1 $7, $f2 @@ -313,7 +313,7 @@ foo: # 32: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled sdc1 $f2, 16($7) # FIXME: SDC1 is correctly rejected but the wrong error message is emitted. - # 32: :[[@LINE-2]]:19: error: invalid operand for instruction + # 32: :[[@LINE-2]]:19: error: expected memory with 16-bit signed offset sqrt.d $f2, $f2 # 32: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled sqrt.s $f2, $f2 @@ -324,7 +324,7 @@ foo: # 32: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled swc1 $f2, 16($7) # FIXME: SWC1 is correctly rejected but the wrong error message is emitted. - # 32: :[[@LINE-2]]:19: error: invalid operand for instruction + # 32: :[[@LINE-2]]:19: error: expected memory with 16-bit signed offset trunc.w.d $f2, $f2 # 32: :[[@LINE-1]]:3: error: instruction requires a CPU feature not currently enabled trunc.w.s $f2, $f2 |