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* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-1/+1
| | | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove superfluous 'inline'Craig Topper2012-04-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155799 91177308-0d34-0410-b5e6-96231b3b80d8
* Add constants for first and last integer vector types to be consistent with ↵Craig Topper2012-04-291-1/+4
| | | | | | floating point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155787 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove tab charactersCraig Topper2012-04-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155786 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark the default cases of MVT::getVectorElementType and ↵Craig Topper2012-04-291-2/+2
| | | | | | MVT:getVectorNumElements as unreachable to reduce code size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155785 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't update spill weights when joining intervals.Jakob Stoklund Olesen2012-04-281-4/+0
| | | | | | We don't compute spill weights until after coalescing anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155766 91177308-0d34-0410-b5e6-96231b3b80d8
* Spring cleaning - Delete dead code.Jakob Stoklund Olesen2012-04-281-24/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155765 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more dead code.Jakob Stoklund Olesen2012-04-252-21/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155566 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify LiveIntervals::getApproximateInstructionCount().Jakob Stoklund Olesen2012-04-251-2/+1
| | | | | | | This function is only used for a heuristic during -join-physregs. It doesn't need floating point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155554 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a dead function.Jakob Stoklund Olesen2012-04-251-6/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155553 91177308-0d34-0410-b5e6-96231b3b80d8
* typo in declaration from earlier todayAndrew Trick2012-04-251-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155519 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a naughty header include that breaks "installed" builds.Andrew Trick2012-04-241-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155486 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: DAG builder support for tracking register pressure within the ↵Andrew Trick2012-04-242-2/+7
| | | | | | | | | current scheduling region. The DAG builder is a convenient place to do it. Hopefully this is more efficient than a separate traversal over the same region. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155456 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r155364 until the upstream review can complete, perChandler Carruth2012-04-231-32/+12
| | | | | | the stated developer policy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155373 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon Packetizer's target independent fix.Sirish Pande2012-04-231-12/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155364 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused PointerLikeTypeTraits for IndexListEntry.Benjamin Kramer2012-04-211-13/+0
| | | | | | | | | It set NumLowBitAvailable = 3 which may not be true on all platforms. We only ever use 2 bits (the default) so this assumption can be safely removed Should fix PR12612. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155288 91177308-0d34-0410-b5e6-96231b3b80d8
* Make ISelPosition a local variable.Jakob Stoklund Olesen2012-04-201-28/+0
| | | | | | | | | Now that multiple DAGUpdateListeners can be active at the same time, ISelPosition can become a local variable in DoInstructionSelection. We simply register an ISelUpdater with CurDAG while ISelPosition exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155249 91177308-0d34-0410-b5e6-96231b3b80d8
* Register DAGUpdateListeners with SelectionDAG.Jakob Stoklund Olesen2012-04-202-40/+54
| | | | | | | | | | | | | | | Instead of passing listener pointers to RAUW, let SelectionDAG itself keep a linked list of interested listeners. This makes it possible to have multiple listeners active at once, like RAUWUpdateListener was already doing. It also makes it possible to register listeners up the call stack without controlling all RAUW calls below. DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG list of active listeners. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
* SparseSet: Add support for key-derived indexes and arbitrary key types.Andrew Trick2012-04-201-6/+2
| | | | | | | | | | | | | | | | | | | This nicely handles the most common case of virtual register sets, but also handles anticipated cases where we will map pointers to IDs. The goal is not to develop a completely generic SparseSet template. Instead we want to handle the expected uses within llvm without any template antics in the client code. I'm adding a bit of template nastiness here, and some assumption about expected usage in order to make the client code very clean. The expected common uses cases I'm designing for: - integer keys that need to be reindexed, and may map to additional data - densely numbered objects where we want pointer keys because no number->object map exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow converting MachineBasicBlock::iterator to const_iterator.Andrew Trick2012-04-201-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155225 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow targets to select the default scheduler by name.Andrew Trick2012-04-192-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155090 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2012-04-191-8/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155089 91177308-0d34-0410-b5e6-96231b3b80d8
* This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth2012-04-181-32/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commits have had several major issues pointed out in review, and those issues are not being addressed in a timely fashion. Furthermore, this was all committed leading up to the v3.1 branch, and we don't need piles of code with outstanding issues in the branch. It is possible that not all of these commits were necessary to revert to get us back to a green state, but I'm going to let the Hexagon maintainer sort that out. They can recommit, in order, after addressing the feedback. Reverted commits, with some notes: Primary commit r154616: HexagonPacketizer - There are lots of review comments here. This is the primary reason for reverting. In particular, it introduced large amount of warnings due to a bad construct in tablegen. - Follow-up commits that should be folded back into this when reposting: - r154622: CMake fixes - r154660: Fix numerous build warnings in release builds. - Please don't resubmit this until the three commits above are included, and the issues in review addressed. Primary commit r154695: Pass to replace transfer/copy ... - Reverted to minimize merge conflicts. I'm not aware of specific issues with this patch. Primary commit r154703: New Value Jump. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154703: Remove iostream usage - r154758: Fix CMake builds - r154759: Fix build warnings in release builds - Please incorporate these fixes and and review feedback before resubmitting. Primary commit r154829: Hexagon V5 (floating point) support. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154841: Remove unused variable (fixing build warnings) There are also accompanying Clang commits that will be reverted for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155047 91177308-0d34-0410-b5e6-96231b3b80d8
* Unbreak the MSVC build, that next() thing again.Francois Pichet2012-04-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154916 91177308-0d34-0410-b5e6-96231b3b80d8
* SlotIndexes used to store the index list in a crufty custom linked-list. I can'tLang Hames2012-04-171-135/+73
| | | | | | | | | | | | for the life of me remember why I wrote it this way, but I can't see any good reason for it now. This patch replaces the custom linked list with an ilist. This change should preserve the existing numberings exactly, so no generated code should change (if it does, file a bug!). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154904 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Added CanHandleTerminators.Andrew Trick2012-04-131-0/+7
| | | | | | | | | This is a special flag for targets that really want their block terminators in the DAG. The default scheduler cannot handle this correctly, so it becomes the specialized scheduler's responsibility to schedule terminators. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154712 91177308-0d34-0410-b5e6-96231b3b80d8
* HexagonPacketizer patch.Sirish Pande2012-04-121-12/+32
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a long standing tail call optimization bug. When a libcall is emittedEvan Cheng2012-04-101-1/+2
| | | | | | | | | | | | | | legalizer always use the DAG entry node. This is wrong when the libcall is emitted as a tail call since it effectively folds the return node. If the return node's input chain is not the entry (i.e. call, load, or store) use that as the tail call input chain. PR12419 rdar://9770785 rdar://11195178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154370 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Eric Christopher2012-04-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154329 91177308-0d34-0410-b5e6-96231b3b80d8
* Always compute all the bits in ComputeMaskedBits.Rafael Espindola2012-04-041-2/+2
| | | | | | | | This allows us to keep passing reduced masks to SimplifyDemandedBits, but know about all the bits if SimplifyDemandedBits fails. This allows instcombine to simplify cases like the one in the included testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
* Matrix simplification in PBQP may push infinite costs onto register options.Lang Hames2012-04-031-0/+6
| | | | | | | | | The colorability heuristic should count these as denied registers. No test case - this exposed a bug on an out-of-tree target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153958 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes to r153903. Added missing explanation of behaviour when the ↵Pete Cooper2012-04-031-0/+5
| | | | | | VirtRegMap is NULL. Also changed it in this case to just avoid updating the map, but live ranges or intervals will still get updated and created git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153914 91177308-0d34-0410-b5e6-96231b3b80d8
* Moved LiveRangeEdit.h so that it can be called from other parts of the ↵Pete Cooper2012-04-021-0/+202
| | | | | | backend, not just libCodeGen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153906 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Add finalizeScheduler to complete the target interface.Andrew Trick2012-04-011-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153827 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach CodeGen's version of computeMaskedBits to understand the range metadata.Rafael Espindola2012-03-314-4/+14
| | | | | | | | This is the CodeGen equivalent of r153747. I tested that there is not noticeable performance difference with any combination of -O0/-O2 /-g when compiling gcc as a single compilation unit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153817 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine code verification in the entire code generator.Jakob Stoklund Olesen2012-03-281-5/+0
| | | | | | | | | | Some targets still mess up the liveness information, but that isn't verified after MRI->invalidateLiveness(). The verifier can still check other useful things like register classes and CFG, so it should be enabled after all passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153615 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an MRI::tracksLiveness() flag.Jakob Stoklund Olesen2012-03-271-0/+22
| | | | | | | | | | | | | | | | | | | | Late optimization passes like branch folding and tail duplication can transform the machine code in a way that makes it expensive to keep the register liveness information up to date. There is a fuzzy line between register allocation and late scheduling where the liveness information degrades. The MRI::tracksLiveness() flag makes the line clear: While true, liveness information is accurate, and can be used for register scavenging. Once the flag is false, liveness information is not accurate, and can only be used as a hint. Late passes generally don't need the liveness information, but they will sometimes use the register scavenger to help update it. The scavenger enforces strict correctness, and we have to spend a lot of code to update register liveness that may never be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153511 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a debug option to dump PBQP graphs during register allocation.Lang Hames2012-03-261-0/+37
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153483 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineInstr: Inline the fast path (non-bundle instruction) of hasProperty.Benjamin Kramer2012-03-171-1/+12
| | | | | | This is particularly helpful as both arguments tend to be constants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152991 91177308-0d34-0410-b5e6-96231b3b80d8
* Limit the number of memory operands in MachineInstr to 2^16 and store the ↵Benjamin Kramer2012-03-161-6/+7
| | | | | | | | number in padding. Saves one machine word on MachineInstr (88->80 bytes on x86_64, 48->44 on i386). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152930 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." ↵NAKAMURA Takumi2012-03-161-2/+1
| | | | | | | | | for workaround of g++-4.4's miscompilation. It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled. When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152877 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: implemented a framework for top-down or bottom-up scheduling.Andrew Trick2012-03-141-0/+7
| | | | | | | | | | | | | | | | | | | New flags: -misched-topdown, -misched-bottomup. They can be used with the default scheduler or with -misched=shuffle. Without either topdown/bottomup flag -misched=shuffle now alternates scheduling direction. LiveIntervals update is unimplemented with bottom-up scheduling, so only -misched-topdown currently works. Capped the ScheduleDAG hierarchy with a concrete ScheduleDAGMI class. ScheduleDAGMI is aware of the top and bottom of the unscheduled zone within the current region. Scheduling policy can be plugged into the ScheduleDAGMI driver by implementing MachineSchedStrategy. ConvergingScheduler is now the default scheduling algorithm. It exercises the new driver but still does no reordering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152700 91177308-0d34-0410-b5e6-96231b3b80d8
* s/SjLjEHPass/SjLjEHPrepare/Bill Wendling2012-03-131-2/+2
| | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152658 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline the d'tor and add an anchor instead.Bill Wendling2012-03-131-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152613 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more static tables of registers used by calling convention to ↵Craig Topper2012-03-111-6/+6
| | | | | | uint16_t to reduce space. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8
* misched interface: rename Begin/End to RegionBegin/RegionEnd since they are ↵Andrew Trick2012-03-091-5/+5
| | | | | | not private. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152382 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: allow the default scheduler to be one chosen by the target.Andrew Trick2012-03-091-3/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152360 91177308-0d34-0410-b5e6-96231b3b80d8
* Added TargetPassConfig::enablePassAndrew Trick2012-03-091-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152359 91177308-0d34-0410-b5e6-96231b3b80d8
* misched interface: Expose the MachineScheduler pass.Andrew Trick2012-03-081-0/+86
| | | | | | | | Allow targets to provide their own schedulers (subclass of ScheduleDAGInstrs) to the misched pass. Select schedulers using -misched=... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152278 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup VLIWPacketizer to use the updated ScheduleDAGInstrs interface.Andrew Trick2012-03-072-13/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152262 91177308-0d34-0410-b5e6-96231b3b80d8
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