| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [mips] Addition of a third operand to the instructions [d]div, [d]divu | Zoran Jovanovic | 2016-05-16 | 1 | -8/+8 |
| | | | | | | | | | | | Author: obucina Reviewers: dsanders Adds support for third operand for [D]DIV[U] instructions. Additional test for case when destination reg is zero register Differential Revision: http://reviews.llvm.org/D16888 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269636 91177308-0d34-0410-b5e6-96231b3b80d8 | ||||
| * | [mips] Added support for the div, divu, ddiv and ddivu macros which use ↵ | Daniel Sanders | 2015-09-03 | 1 | -0/+18 |
| traps and breaks in the integrated assembler. Summary: Patch by Scott Egerton Reviewers: vkalintiris, dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11675 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246763 91177308-0d34-0410-b5e6-96231b3b80d8 | |||||
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