| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips] not instruction alias | Simon Dardis | 2016-11-16 | 1 | -0/+2 |
| * | Revert "[mips] Fix c.<cc>.<fmt> instruction definition." | Simon Dardis | 2016-09-09 | 2 | -48/+32 |
| * | [mips] Fix c.<cc>.<fmt> instruction definition. | Simon Dardis | 2016-09-09 | 2 | -32/+48 |
| * | [mips] Add l.[sd] and s.[sd] instruction aliases | Simon Dardis | 2016-08-17 | 1 | -0/+4 |
| * | [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases | Simon Dardis | 2016-07-26 | 1 | -0/+9 |
| * | [mips] Weaken asm predicate for memory offsets | Simon Dardis | 2016-05-27 | 1 | -0/+24 |
| * | [mips] Range check uimm20 and fixed a bug this revealed. | Daniel Sanders | 2016-02-29 | 1 | -0/+2 |
| * | [mips] added support for trunc macro | Zoran Jovanovic | 2016-02-22 | 1 | -2/+4 |
| * | [mips] Never select JAL for calls to an absolute immediate address. | Daniel Sanders | 2016-01-11 | 1 | -0/+1 |
| * | [mips] Added support for various EVA ASE instructions. | Daniel Sanders | 2015-09-15 | 1 | -1/+1 |
| * | [mips] Remap move as or. | Vasileios Kalintiris | 2015-08-11 | 1 | -2/+2 |
| * | [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0. | Daniel Sanders | 2015-06-27 | 1 | -2/+2 |
| * | [mips][msa] Test basic operations for the N32 ABI too. | Daniel Sanders | 2015-05-05 | 1 | -0/+3 |
| * | [mips] [IAS] Remove AssemblerPredicate's from RelocPIC and RelocStatic. | Toma Tabacu | 2015-04-08 | 1 | -1/+8 |
| * | [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction. | Toma Tabacu | 2015-03-17 | 1 | -0/+1 |
| * | [mips] Add support for COP1's Branch-On-Cond-Likely instructions | Vasileios Kalintiris | 2014-10-17 | 1 | -0/+6 |
| * | [mips] Add support for COP0's Branch-On-Cond-Likely instructions | Vasileios Kalintiris | 2014-10-17 | 1 | -0/+8 |
| * | [mips] Marked the DI/EI instruction aliases as MIPS32r2 | Vasileios Kalintiris | 2014-10-16 | 1 | -0/+2 |
| * | [mips] Move 32-bit ADDiu instruction alias from Mips64InstrInfo.td to MipsIns... | Toma Tabacu | 2014-09-16 | 1 | -0/+1 |
| * | [mips] Marked the ADDi instruction aliases as not available in Mips32R6 and M... | Toma Tabacu | 2014-09-16 | 1 | -0/+4 |
| * | [mips] Marked the Trap-on-Condition instructions as Mips II | Daniel Sanders | 2014-09-05 | 1 | -0/+12 |
| * | Revert: r215698 - Current implementation of c.cond.fmt instructions only acce... | Daniel Sanders | 2014-08-17 | 2 | -28/+28 |
| * | Current implementation of c.cond.fmt instructions only accept default cc0 reg... | Vladimir Medic | 2014-08-15 | 2 | -28/+28 |
| * | Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, ... | Daniel Sanders | 2014-07-14 | 1 | -21/+20 |
| * | Revert: [mips] Correct section alignments and EntrySizes for .bss, .text, .da... | Daniel Sanders | 2014-07-14 | 1 | -20/+21 |
| * | [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reg... | Daniel Sanders | 2014-07-14 | 1 | -21/+20 |
| * | [mips] Correct the AFL_FLAGS1_ODDSPREG flag in .MIPS.abiflags when no '.modul... | Daniel Sanders | 2014-07-14 | 1 | -1/+1 |
| * | [Mips] Support SHT_MIPS_ABIFLAGS section type flag in the llvm-readobj, | Simon Atanasyan | 2014-07-13 | 1 | -1/+1 |
| * | Mips.abiflags is a new implicitly generated section that will be present on ... | Vladimir Medic | 2014-07-08 | 1 | -0/+37 |
| * | [mips] Added support for assembling sdbbp. | Daniel Sanders | 2014-06-24 | 1 | -0/+2 |
| * | [mips] SYNC $stype instruction was added in Mips32 | Matheus Almeida | 2014-06-18 | 1 | -0/+2 |
| * | [mips] Update MipsAsmParser so that it's possible to handle immediates that s... | Matheus Almeida | 2014-06-18 | 1 | -0/+1 |
| * | [mips] Implement alias for 'and' and 'or' instructions for all ISAs. | Matheus Almeida | 2014-06-18 | 1 | -0/+2 |
| * | [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-16 | 1 | -2/+2 |
| * | [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6. | Daniel Sanders | 2014-06-16 | 1 | -2/+2 |
| * | [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rat... | Daniel Sanders | 2014-06-16 | 1 | -4/+4 |
| * | [mips] Add cache and pref instructions | Daniel Sanders | 2014-06-13 | 1 | -0/+2 |
| * | [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal i... | Daniel Sanders | 2014-06-13 | 1 | -0/+4 |
| * | [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 | 1 | -0/+6 |
| * | [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu... | Daniel Sanders | 2014-05-13 | 2 | -8/+8 |
| * | [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m... | Daniel Sanders | 2014-05-12 | 2 | -3/+3 |
| * | [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64 | Daniel Sanders | 2014-05-12 | 1 | -0/+9 |
| * | [mips] Added missing dsra -> dsrav and sra -> srav aliases. | Daniel Sanders | 2014-05-09 | 1 | -0/+1 |
| * | [mips] Correct tests that are meant to test valid assembly. They were actuall... | Daniel Sanders | 2014-05-08 | 2 | -173/+173 |
| * | [mips] Implement l[wd]c3, and s[wd]c3. | Daniel Sanders | 2014-05-08 | 1 | -2/+0 |
| * | [mips] Implement tlbp, tlbr, tlbwi, and tlbwr | Daniel Sanders | 2014-05-08 | 2 | -4/+4 |
| * | [mips] Removed two-operand alias for sllv, sr[al]v, rotrv, dsllv, dsr[al]v, a... | Daniel Sanders | 2014-05-01 | 2 | -4/+0 |
| * | [mips] Add instruction alias (negu). | Matheus Almeida | 2014-04-30 | 1 | -0/+2 |
| * | [mips] Add instruction alias (sltu). | Matheus Almeida | 2014-04-30 | 1 | -0/+1 |
| * | [mips] Add instruction alias (sll and srl). | Matheus Almeida | 2014-04-30 | 1 | -0/+2 |
