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| author | Tom Stellard <tstellar@redhat.com> | 2017-09-29 23:52:26 +0000 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2017-09-29 23:52:26 +0000 |
| commit | 232230afd349ceeb784720d2266e2288523d871f (patch) | |
| tree | ab1cd18d4a2c779b80e1295ccb51f7662e85a37a | |
| parent | 3c901e3c4d467e5305763e236db4fc6ffaa3ec42 (diff) | |
Merging r313392:
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r313392 | ctopper | 2017-09-15 13:27:59 -0700 (Fri, 15 Sep 2017) | 7 lines
[X86] Disable _mm512_maskz_set1_epi64 intrinsic on 32-bit targets to prevent a backend isel failure.
The __builtin_ia32_pbroadcastq512_mem_mask we were previously trying to use in 32-bit mode is not implemented in the x86 backend and causes isel to fail in release builds. In debug builds it fails even earlier during legalization with an llvm_unreachable.
While there add the missing test case for this intrinsic for this for 64-bit mode.
This fixes PR34631. D37668 should be able to recover this for 32-bit mode soon. But I wanted to fix the crash ahead of that.
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git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_50@314569 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/clang/Basic/BuiltinsX86.def | 1 | ||||
| -rw-r--r-- | lib/Headers/avx512fintrin.h | 9 | ||||
| -rw-r--r-- | test/CodeGen/avx512f-builtins.c | 7 |
3 files changed, 9 insertions, 8 deletions
diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def index 6d3a478ac3..2f8f8919e5 100644 --- a/include/clang/Basic/BuiltinsX86.def +++ b/include/clang/Basic/BuiltinsX86.def @@ -976,7 +976,6 @@ TARGET_BUILTIN(__builtin_ia32_pmuludq512, "V8LLiV16iV16i", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_ptestmd512, "UsV16iV16iUs", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_ptestmq512, "UcV8LLiV8LLiUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_pbroadcastd512_gpr_mask, "V16iiV16iUs", "", "avx512f") -TARGET_BUILTIN(__builtin_ia32_pbroadcastq512_mem_mask, "V8LLiLLiV8LLiUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_loaddqusi512_mask, "V16iiC*V16iUs", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_loaddqudi512_mask, "V8LLiLLiC*V8LLiUc", "", "avx512f") TARGET_BUILTIN(__builtin_ia32_loadups512_mask, "V16ffC*V16fUs", "", "avx512f") diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h index 4ce6945311..4b66acc02f 100644 --- a/lib/Headers/avx512fintrin.h +++ b/lib/Headers/avx512fintrin.h @@ -267,21 +267,16 @@ _mm512_maskz_set1_epi32(__mmask16 __M, int __A) __M); } +#ifdef __x86_64__ static __inline __m512i __DEFAULT_FN_ATTRS _mm512_maskz_set1_epi64(__mmask8 __M, long long __A) { -#ifdef __x86_64__ return (__m512i) __builtin_ia32_pbroadcastq512_gpr_mask (__A, (__v8di) _mm512_setzero_si512 (), __M); -#else - return (__m512i) __builtin_ia32_pbroadcastq512_mem_mask (__A, - (__v8di) - _mm512_setzero_si512 (), - __M); -#endif } +#endif static __inline __m512 __DEFAULT_FN_ATTRS _mm512_setzero_ps(void) diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c index c3356461a3..1ce09df7ca 100644 --- a/test/CodeGen/avx512f-builtins.c +++ b/test/CodeGen/avx512f-builtins.c @@ -7929,6 +7929,13 @@ __m512i test_mm512_mask_set1_epi64 (__m512i __O, __mmask8 __M, long long __A) //CHECK: @llvm.x86.avx512.mask.pbroadcast.q.gpr.512 return _mm512_mask_set1_epi64 (__O, __M, __A); } + +__m512i test_mm512_maskz_set1_epi64 (__mmask8 __M, long long __A) +{ + //CHECK-LABEL: @test_mm512_maskz_set1_epi64 + //CHECK: @llvm.x86.avx512.mask.pbroadcast.q.gpr.512 + return _mm512_maskz_set1_epi64 (__M, __A); +} #endif __m512i test_mm512_set_epi64 (long long __A, long long __B, long long __C, |