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authorYaxun Liu <Yaxun.Liu@amd.com>2019-04-30 18:35:37 +0000
committerYaxun Liu <Yaxun.Liu@amd.com>2019-04-30 18:35:37 +0000
commit63e574d77118038bbb1364585dc3a681660bc252 (patch)
tree2923725f8568145aef4ac31cfef2752925605e5e
parentfcfa5da42784b3c350c3ce31373656904e6d06dd (diff)
AMDGPU: Enable _Float16
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@359594 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Basic/Targets/AMDGPU.cpp3
-rw-r--r--test/CodeGenCXX/amdgpu-float16.cpp19
2 files changed, 22 insertions, 0 deletions
diff --git a/lib/Basic/Targets/AMDGPU.cpp b/lib/Basic/Targets/AMDGPU.cpp
index 4ce438cade..922f02f73d 100644
--- a/lib/Basic/Targets/AMDGPU.cpp
+++ b/lib/Basic/Targets/AMDGPU.cpp
@@ -252,6 +252,9 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
!isAMDGCN(Triple));
UseAddrSpaceMapMangling = true;
+ HasLegalHalfType = true;
+ HasFloat16 = true;
+
// Set pointer width and alignment for target address space 0.
PointerWidth = PointerAlign = DataLayout->getPointerSizeInBits();
if (getMaxPointerWidth() == 64) {
diff --git a/test/CodeGenCXX/amdgpu-float16.cpp b/test/CodeGenCXX/amdgpu-float16.cpp
new file mode 100644
index 0000000000..8119466f57
--- /dev/null
+++ b/test/CodeGenCXX/amdgpu-float16.cpp
@@ -0,0 +1,19 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx701 -S -o - %s | FileCheck %s -check-prefix=NOF16
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx803 -S -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -S -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -S -o - %s | FileCheck %s
+void f() {
+ _Float16 x, y, z;
+ // CHECK: v_add_f16_e64
+ // NOF16: v_add_f32_e64
+ z = x + y;
+ // CHECK: v_sub_f16_e64
+ // NOF16: v_sub_f32_e64
+ z = x - y;
+ // CHECK: v_mul_f16_e64
+ // NOF16: v_mul_f32_e64
+ z = x * y;
+ // CHECK: v_div_fixup_f16
+ // NOF16: v_div_fixup_f32
+ z = x / y;
+}