Implement __atomic_fetch_nand and __atomic_nand_fetch to complete our set of

GNU __atomic builtins.


git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@154659 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 32 insertions, 1 deletions

diff --git a/include/clang/Basic/Builtins.def b/include/clang/Basic/Builtins.def
index 7e3a245133..d1af218c27 100644
--- a/include/clang/Basic/Builtins.def
+++ b/include/clang/Basic/Builtins.def
@@ -630,11 +630,13 @@ ATOMIC_BUILTIN(__atomic_fetch_sub, "v.", "t")
 ATOMIC_BUILTIN(__atomic_fetch_and, "v.", "t")
 ATOMIC_BUILTIN(__atomic_fetch_or, "v.", "t")
 ATOMIC_BUILTIN(__atomic_fetch_xor, "v.", "t")
+ATOMIC_BUILTIN(__atomic_fetch_nand, "v.", "t")
 ATOMIC_BUILTIN(__atomic_add_fetch, "v.", "t")
 ATOMIC_BUILTIN(__atomic_sub_fetch, "v.", "t")
 ATOMIC_BUILTIN(__atomic_and_fetch, "v.", "t")
 ATOMIC_BUILTIN(__atomic_or_fetch, "v.", "t")
 ATOMIC_BUILTIN(__atomic_xor_fetch, "v.", "t")
+ATOMIC_BUILTIN(__atomic_nand_fetch, "v.", "t")
 BUILTIN(__atomic_test_and_set, "bvD*i", "n")
 BUILTIN(__atomic_clear, "vvD*i", "n")
 BUILTIN(__atomic_thread_fence, "vi", "n")
diff --git a/lib/AST/Expr.cpp b/lib/AST/Expr.cpp
index eb185b2c5a..868109e3d5 100644
--- a/lib/AST/Expr.cpp
+++ b/lib/AST/Expr.cpp
@@ -3879,11 +3879,13 @@ unsigned AtomicExpr::getNumSubExprs(AtomicOp Op) {
   case AO__atomic_fetch_and:
   case AO__atomic_fetch_or:
   case AO__atomic_fetch_xor:
+  case AO__atomic_fetch_nand:
   case AO__atomic_add_fetch:
   case AO__atomic_sub_fetch:
   case AO__atomic_and_fetch:
   case AO__atomic_or_fetch:
   case AO__atomic_xor_fetch:
+  case AO__atomic_nand_fetch:
     return 3;
 
   case AO__atomic_exchange:
diff --git a/lib/CodeGen/CGExpr.cpp b/lib/CodeGen/CGExpr.cpp
index c92cbb2010..08970fd738 100644
--- a/lib/CodeGen/CGExpr.cpp
+++ b/lib/CodeGen/CGExpr.cpp
@@ -2788,6 +2788,13 @@ EmitAtomicOp(CodeGenFunction &CGF, AtomicExpr *E, llvm::Value *Dest,
   case AtomicExpr::AO__atomic_fetch_xor:
     Op = llvm::AtomicRMWInst::Xor;
     break;
+
+  case AtomicExpr::AO__atomic_nand_fetch:
+    PostOp = llvm::Instruction::And;
+    // Fall through.
+  case AtomicExpr::AO__atomic_fetch_nand:
+    Op = llvm::AtomicRMWInst::Nand;
+    break;
   }
 
   llvm::LoadInst *LoadVal1 = CGF.Builder.CreateLoad(Val1);
@@ -2801,7 +2808,8 @@ EmitAtomicOp(CodeGenFunction &CGF, AtomicExpr *E, llvm::Value *Dest,
   llvm::Value *Result = RMWI;
   if (PostOp)
     Result = CGF.Builder.CreateBinOp(PostOp, RMWI, LoadVal1);
-
+  if (E->getOp() == AtomicExpr::AO__atomic_nand_fetch)
+    Result = CGF.Builder.CreateNot(Result);
   llvm::StoreInst *StoreDest = CGF.Builder.CreateStore(Result, Dest);
   StoreDest->setAlignment(Align);
 }
@@ -2933,9 +2941,11 @@ RValue CodeGenFunction::EmitAtomicExpr(AtomicExpr *E, llvm::Value *Dest) {
   case AtomicExpr::AO__atomic_fetch_and:
   case AtomicExpr::AO__atomic_fetch_or:
   case AtomicExpr::AO__atomic_fetch_xor:
+  case AtomicExpr::AO__atomic_fetch_nand:
   case AtomicExpr::AO__atomic_and_fetch:
   case AtomicExpr::AO__atomic_or_fetch:
   case AtomicExpr::AO__atomic_xor_fetch:
+  case AtomicExpr::AO__atomic_nand_fetch:
     Val1 = EmitValToTemp(*this, E->getVal1());
     break;
   }
diff --git a/lib/Sema/SemaChecking.cpp b/lib/Sema/SemaChecking.cpp
index 7fabfaf565..0d15ce24b0 100644
--- a/lib/Sema/SemaChecking.cpp
+++ b/lib/Sema/SemaChecking.cpp
@@ -560,9 +560,11 @@ ExprResult Sema::SemaAtomicOpsOverloaded(ExprResult TheCallResult,
   case AtomicExpr::AO__atomic_fetch_and:
   case AtomicExpr::AO__atomic_fetch_or:
   case AtomicExpr::AO__atomic_fetch_xor:
+  case AtomicExpr::AO__atomic_fetch_nand:
   case AtomicExpr::AO__atomic_and_fetch:
   case AtomicExpr::AO__atomic_or_fetch:
   case AtomicExpr::AO__atomic_xor_fetch:
+  case AtomicExpr::AO__atomic_nand_fetch:
     Form = Arithmetic;
     break;
 
diff --git a/test/CodeGen/atomic-ops.c b/test/CodeGen/atomic-ops.c
index a8de19d1b5..1a9ed36ee2 100644
--- a/test/CodeGen/atomic-ops.c
+++ b/test/CodeGen/atomic-ops.c
@@ -74,6 +74,21 @@ int fi3b(int *i) {
   return __atomic_add_fetch(i, 1, memory_order_seq_cst);
 }
 
+int fi3c(int *i) {
+  // CHECK: @fi3c
+  // CHECK: atomicrmw nand
+  // CHECK-NOT: and
+  return __atomic_fetch_nand(i, 1, memory_order_seq_cst);
+}
+
+int fi3d(int *i) {
+  // CHECK: @fi3d
+  // CHECK: atomicrmw nand
+  // CHECK: and
+  // CHECK: xor
+  return __atomic_nand_fetch(i, 1, memory_order_seq_cst);
+}
+
 _Bool fi4(_Atomic(int) *i) {
   // CHECK: @fi4
   // CHECK: cmpxchg i32*