diff options
| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-01-16 08:53:53 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-01-16 08:53:53 +0000 |
| commit | 4587e1f8698e96ac836e0f93b296b2b2bf83ea5c (patch) | |
| tree | d821f66bba80359c47f9775be7de862cceb44a55 | |
| parent | c97f7edfb93c3a9923deafb6bbb643e76315678d (diff) | |
Merging r226136:
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r226136 | atanasyan | 2015-01-15 07:04:48 +0000 (Thu, 15 Jan 2015) | 1 line
[Mips] Define macros `__mips_isa_rev` in case of mips32r6/mips64r6 options
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git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_36@226252 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Basic/Targets.cpp | 4 | ||||
| -rw-r--r-- | test/Preprocessor/init.c | 18 |
2 files changed, 22 insertions, 0 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 4c64a02b5b..45a3717292 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -5922,6 +5922,8 @@ public: Builder.defineMacro("__mips_isa_rev", "1"); else if (CPUStr == "mips32r2") Builder.defineMacro("__mips_isa_rev", "2"); + else if (CPUStr == "mips32r6") + Builder.defineMacro("__mips_isa_rev", "6"); if (ABI == "o32") { Builder.defineMacro("__mips_o32"); @@ -6065,6 +6067,8 @@ public: Builder.defineMacro("__mips_isa_rev", "1"); else if (CPUStr == "mips64r2") Builder.defineMacro("__mips_isa_rev", "2"); + else if (CPUStr == "mips64r6") + Builder.defineMacro("__mips_isa_rev", "6"); if (ABI == "n32") { Builder.defineMacro("__mips_n32"); diff --git a/test/Preprocessor/init.c b/test/Preprocessor/init.c index 4f321140c6..f4fa4562be 100644 --- a/test/Preprocessor/init.c +++ b/test/Preprocessor/init.c @@ -3442,6 +3442,15 @@ // MIPS-ARCH-32R2:#define _MIPS_ISA _MIPS_ISA_MIPS32 // MIPS-ARCH-32R2:#define __mips_isa_rev 2 // +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \ +// RUN: -target-cpu mips32r6 < /dev/null \ +// RUN: | FileCheck -check-prefix MIPS-ARCH-32R6 %s +// +// MIPS-ARCH-32R6:#define _MIPS_ARCH "mips32r6" +// MIPS-ARCH-32R6:#define _MIPS_ARCH_MIPS32R6 1 +// MIPS-ARCH-32R6:#define _MIPS_ISA _MIPS_ISA_MIPS32 +// MIPS-ARCH-32R6:#define __mips_isa_rev 6 +// // RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \ // RUN: < /dev/null \ // RUN: | FileCheck -check-prefix MIPS-ARCH-DEF64 %s @@ -3469,6 +3478,15 @@ // MIPS-ARCH-64R2:#define _MIPS_ISA _MIPS_ISA_MIPS64 // MIPS-ARCH-64R2:#define __mips_isa_rev 2 // +// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \ +// RUN: -target-cpu mips64r6 < /dev/null \ +// RUN: | FileCheck -check-prefix MIPS-ARCH-64R6 %s +// +// MIPS-ARCH-64R6:#define _MIPS_ARCH "mips64r6" +// MIPS-ARCH-64R6:#define _MIPS_ARCH_MIPS64R6 1 +// MIPS-ARCH-64R6:#define _MIPS_ISA _MIPS_ISA_MIPS64 +// MIPS-ARCH-64R6:#define __mips_isa_rev 6 +// // Check MIPS float ABI macros // // RUN: %clang_cc1 -E -dM -ffreestanding \ |