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authorCraig Topper <craig.topper@intel.com>2018-06-27 15:57:57 +0000
committerCraig Topper <craig.topper@intel.com>2018-06-27 15:57:57 +0000
commit8631eadc2482657ee16b6f82703ba6e605deeb8f (patch)
treef0861bb26c750a1acb5beb8ffc4ba39827c64c8d
parentcac78d347177e10966daa3aaf2f63049138ce88f (diff)
[X86] Rename llvm.x86.avx512.mask.fpclass.p* to exclude 'mask.' from the name to match llvm.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@335745 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/CGBuiltin.cpp12
-rw-r--r--test/CodeGen/avx512dq-builtins.c8
-rw-r--r--test/CodeGen/avx512vldq-builtins.c16
3 files changed, 18 insertions, 18 deletions
diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp
index 309528404f..14bf0a78ad 100644
--- a/lib/CodeGen/CGBuiltin.cpp
+++ b/lib/CodeGen/CGBuiltin.cpp
@@ -10087,22 +10087,22 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
switch (BuiltinID) {
default: llvm_unreachable("Unsupported intrinsic!");
case X86::BI__builtin_ia32_fpclassps128_mask:
- ID = Intrinsic::x86_avx512_mask_fpclass_ps_128;
+ ID = Intrinsic::x86_avx512_fpclass_ps_128;
break;
case X86::BI__builtin_ia32_fpclassps256_mask:
- ID = Intrinsic::x86_avx512_mask_fpclass_ps_256;
+ ID = Intrinsic::x86_avx512_fpclass_ps_256;
break;
case X86::BI__builtin_ia32_fpclassps512_mask:
- ID = Intrinsic::x86_avx512_mask_fpclass_ps_512;
+ ID = Intrinsic::x86_avx512_fpclass_ps_512;
break;
case X86::BI__builtin_ia32_fpclasspd128_mask:
- ID = Intrinsic::x86_avx512_mask_fpclass_pd_128;
+ ID = Intrinsic::x86_avx512_fpclass_pd_128;
break;
case X86::BI__builtin_ia32_fpclasspd256_mask:
- ID = Intrinsic::x86_avx512_mask_fpclass_pd_256;
+ ID = Intrinsic::x86_avx512_fpclass_pd_256;
break;
case X86::BI__builtin_ia32_fpclasspd512_mask:
- ID = Intrinsic::x86_avx512_mask_fpclass_pd_512;
+ ID = Intrinsic::x86_avx512_fpclass_pd_512;
break;
}
diff --git a/test/CodeGen/avx512dq-builtins.c b/test/CodeGen/avx512dq-builtins.c
index f5c4b2633b..242b9d3995 100644
--- a/test/CodeGen/avx512dq-builtins.c
+++ b/test/CodeGen/avx512dq-builtins.c
@@ -1234,25 +1234,25 @@ __m512i test_mm512_maskz_inserti64x2(__mmask8 __U, __m512i __A, __m128i __B) {
}
__mmask8 test_mm512_mask_fpclass_pd_mask(__mmask8 __U, __m512d __A) {
// CHECK-LABEL: @test_mm512_mask_fpclass_pd_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.pd.512
+ // CHECK: @llvm.x86.avx512.fpclass.pd.512
return _mm512_mask_fpclass_pd_mask(__U, __A, 4);
}
__mmask8 test_mm512_fpclass_pd_mask(__m512d __A) {
// CHECK-LABEL: @test_mm512_fpclass_pd_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.pd.512
+ // CHECK: @llvm.x86.avx512.fpclass.pd.512
return _mm512_fpclass_pd_mask(__A, 4);
}
__mmask16 test_mm512_mask_fpclass_ps_mask(__mmask16 __U, __m512 __A) {
// CHECK-LABEL: @test_mm512_mask_fpclass_ps_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.ps.512
+ // CHECK: @llvm.x86.avx512.fpclass.ps.512
return _mm512_mask_fpclass_ps_mask(__U, __A, 4);
}
__mmask16 test_mm512_fpclass_ps_mask(__m512 __A) {
// CHECK-LABEL: @test_mm512_fpclass_ps_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.ps.512
+ // CHECK: @llvm.x86.avx512.fpclass.ps.512
return _mm512_fpclass_ps_mask(__A, 4);
}
diff --git a/test/CodeGen/avx512vldq-builtins.c b/test/CodeGen/avx512vldq-builtins.c
index 31ae623fee..b21b665eb9 100644
--- a/test/CodeGen/avx512vldq-builtins.c
+++ b/test/CodeGen/avx512vldq-builtins.c
@@ -1104,48 +1104,48 @@ __m256i test_mm256_maskz_inserti64x2(__mmask8 __U, __m256i __A, __m128i __B) {
__mmask8 test_mm_mask_fpclass_pd_mask(__mmask8 __U, __m128d __A) {
// CHECK-LABEL: @test_mm_mask_fpclass_pd_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.pd.128
+ // CHECK: @llvm.x86.avx512.fpclass.pd.128
return _mm_mask_fpclass_pd_mask(__U, __A, 2);
}
__mmask8 test_mm_fpclass_pd_mask(__m128d __A) {
// CHECK-LABEL: @test_mm_fpclass_pd_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.pd.128
+ // CHECK: @llvm.x86.avx512.fpclass.pd.128
return _mm_fpclass_pd_mask(__A, 2);
}
__mmask8 test_mm256_mask_fpclass_pd_mask(__mmask8 __U, __m256d __A) {
// CHECK-LABEL: @test_mm256_mask_fpclass_pd_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.pd.256
+ // CHECK: @llvm.x86.avx512.fpclass.pd.256
return _mm256_mask_fpclass_pd_mask(__U, __A, 2);
}
__mmask8 test_mm256_fpclass_pd_mask(__m256d __A) {
// CHECK-LABEL: @test_mm256_fpclass_pd_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.pd.256
+ // CHECK: @llvm.x86.avx512.fpclass.pd.256
return _mm256_fpclass_pd_mask(__A, 2);
}
__mmask8 test_mm_mask_fpclass_ps_mask(__mmask8 __U, __m128 __A) {
// CHECK-LABEL: @test_mm_mask_fpclass_ps_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.ps.128
+ // CHECK: @llvm.x86.avx512.fpclass.ps.128
return _mm_mask_fpclass_ps_mask(__U, __A, 2);
}
__mmask8 test_mm_fpclass_ps_mask(__m128 __A) {
// CHECK-LABEL: @test_mm_fpclass_ps_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.ps.128
+ // CHECK: @llvm.x86.avx512.fpclass.ps.128
return _mm_fpclass_ps_mask(__A, 2);
}
__mmask8 test_mm256_mask_fpclass_ps_mask(__mmask8 __U, __m256 __A) {
// CHECK-LABEL: @test_mm256_mask_fpclass_ps_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.ps.256
+ // CHECK: @llvm.x86.avx512.fpclass.ps.256
return _mm256_mask_fpclass_ps_mask(__U, __A, 2);
}
__mmask8 test_mm256_fpclass_ps_mask(__m256 __A) {
// CHECK-LABEL: @test_mm256_fpclass_ps_mask
- // CHECK: @llvm.x86.avx512.mask.fpclass.ps.256
+ // CHECK: @llvm.x86.avx512.fpclass.ps.256
return _mm256_fpclass_ps_mask(__A, 2);
}