diff options
| author | James Molloy <james.molloy@arm.com> | 2014-09-05 13:50:34 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2014-09-05 13:50:34 +0000 |
| commit | 2dd5c2d4fe80952f77e7363d519f3f0bc6a9390c (patch) | |
| tree | 0b5dfaf774372cc16edd108798f2029f58555374 /include/clang/Basic/arm_neon.td | |
| parent | 1deae20fa020262c4336848baecfd7bb444a32e6 (diff) | |
[ARMv8] Add support for 32-bit MIN/MAXNM and directed rounding.
This patch adds support for the 32bit numeric max/min and directed round-to-integral NEON intrinsics that were added as part of v8, along with unit tests.
Patch by Graham Hunter!
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@217242 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/clang/Basic/arm_neon.td')
| -rw-r--r-- | include/clang/Basic/arm_neon.td | 47 |
1 files changed, 35 insertions, 12 deletions
diff --git a/include/clang/Basic/arm_neon.td b/include/clang/Basic/arm_neon.td index 0247bb5dd0..8208a2c962 100644 --- a/include/clang/Basic/arm_neon.td +++ b/include/clang/Basic/arm_neon.td @@ -944,13 +944,6 @@ def VCVT_F64 : SInst<"vcvt_f64", "Fd", "lUlQlQUl">; def VCVT_HIGH_F64_F32 : SOpInst<"vcvt_high_f64", "wj", "f", OP_VCVT_EX_HI_F64>; def VCVTX_F32_F64 : SInst<"vcvtx_f32", "fj", "d">; def VCVTX_HIGH_F32_F64 : SOpInst<"vcvtx_high_f32", "qfj", "d", OP_VCVTX_HI>; -def FRINTN : SInst<"vrndn", "dd", "fdQfQd">; -def FRINTA : SInst<"vrnda", "dd", "fdQfQd">; -def FRINTP : SInst<"vrndp", "dd", "fdQfQd">; -def FRINTM : SInst<"vrndm", "dd", "fdQfQd">; -def FRINTX : SInst<"vrndx", "dd", "fdQfQd">; -def FRINTZ : SInst<"vrnd", "dd", "fdQfQd">; -def FRINTI : SInst<"vrndi", "dd", "fdQfQd">; def VCVT_S64 : SInst<"vcvt_s64", "xd", "dQd">; def VCVT_U64 : SInst<"vcvt_u64", "ud", "dQd">; def FRECPE : SInst<"vrecpe", "dd", "dQd">; @@ -983,11 +976,6 @@ def MAX : SInst<"vmax", "ddd", "dQd">; def MIN : SInst<"vmin", "ddd", "dQd">; //////////////////////////////////////////////////////////////////////////////// -// MaxNum/MinNum Floating Point -def FMAXNM : SInst<"vmaxnm", "ddd", "fdQfQd">; -def FMINNM : SInst<"vminnm", "ddd", "fdQfQd">; - -//////////////////////////////////////////////////////////////////////////////// // Pairwise Max/Min def MAXP : SInst<"vpmax", "ddd", "QcQsQiQUcQUsQUiQfQd">; def MINP : SInst<"vpmin", "ddd", "QcQsQiQUcQUsQUiQfQd">; @@ -1223,6 +1211,41 @@ def FCVTAU_S64 : SInst<"vcvta_u64", "ud", "dQd">; } //////////////////////////////////////////////////////////////////////////////// +// Round to Integral + +let ArchGuard = "__ARM_ARCH >= 8" in { +def FRINTN_S32 : SInst<"vrndn", "dd", "fQf">; +def FRINTA_S32 : SInst<"vrnda", "dd", "fQf">; +def FRINTP_S32 : SInst<"vrndp", "dd", "fQf">; +def FRINTM_S32 : SInst<"vrndm", "dd", "fQf">; +def FRINTX_S32 : SInst<"vrndx", "dd", "fQf">; +def FRINTZ_S32 : SInst<"vrnd", "dd", "fQf">; +} + +let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in { +def FRINTN_S64 : SInst<"vrndn", "dd", "dQd">; +def FRINTA_S64 : SInst<"vrnda", "dd", "dQd">; +def FRINTP_S64 : SInst<"vrndp", "dd", "dQd">; +def FRINTM_S64 : SInst<"vrndm", "dd", "dQd">; +def FRINTX_S64 : SInst<"vrndx", "dd", "dQd">; +def FRINTZ_S64 : SInst<"vrnd", "dd", "dQd">; +def FRINTI_S64 : SInst<"vrndi", "dd", "fdQfQd">; +} + +//////////////////////////////////////////////////////////////////////////////// +// MaxNum/MinNum Floating Point + +let ArchGuard = "__ARM_ARCH >= 8" in { +def FMAXNM_S32 : SInst<"vmaxnm", "ddd", "fQf">; +def FMINNM_S32 : SInst<"vminnm", "ddd", "fQf">; +} + +let ArchGuard = "__ARM_ARCH >= 8 && defined(__aarch64__)" in { +def FMAXNM_S64 : SInst<"vmaxnm", "ddd", "dQd">; +def FMINNM_S64 : SInst<"vminnm", "ddd", "dQd">; +} + +//////////////////////////////////////////////////////////////////////////////// // Permutation def VTRN1 : SOpInst<"vtrn1", "ddd", "csiUcUsUifPcPsQcQsQiQlQUcQUsQUiQUlQfQdQPcQPsQPl", OP_TRN1>; |