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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-07-21 18:07:15 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-07-21 18:07:15 +0000
commit55174d052d4e6bd63c5dbd75607542b5a3f4ad23 (patch)
tree888e220f806b46b71992d1c3f83a48114f6edfaf /lib/Basic/Targets.cpp
parentd734bdd5f9e6bda54e4b12272bda71e0f7f466fb (diff)
[Hexagon] Add inline-asm constraint 'a' for modifier register class
For example asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory") git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@308763 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Basic/Targets.cpp')
-rw-r--r--lib/Basic/Targets.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 01137b66b3..d488ed1dbd 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -6887,6 +6887,9 @@ public:
return true;
}
break;
+ case 'a': // Modifier register m0-m1.
+ Info.setAllowsRegister();
+ return true;
case 's':
// Relocatable constant.
return true;