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authorYaxun Liu <Yaxun.Liu@amd.com>2017-07-04 19:57:18 +0000
committerYaxun Liu <Yaxun.Liu@amd.com>2017-07-04 19:57:18 +0000
commit9ab24b50c19a33c6868f9dde7fce1dac915e6a6e (patch)
tree36ee2239dfade4fb1c868b3b767e4061f17f4c39 /lib/Basic/Targets.cpp
parent2382d78024b46e906d5fdda758874f9d25ee3c6f (diff)
[AMDGPU] Fix regressions on mesa/clover with libclc due to address space
Currently AMDGPUTargetInfo does not initialize AddrSpaceMap in constructor, which causes regressions in mesa/clover with libclc. This patch fixes that. Differential Revision: https://reviews.llvm.org/D34987 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@307105 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Basic/Targets.cpp')
-rw-r--r--lib/Basic/Targets.cpp28
1 files changed, 18 insertions, 10 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 4f04489a4a..4ff61eb522 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -2049,7 +2049,7 @@ ArrayRef<const char *> NVPTXTargetInfo::getGCCRegNames() const {
return llvm::makeArrayRef(GCCRegNames);
}
-static const LangAS::Map AMDGPUNonOpenCLPrivateIsZeroMap = {
+static const LangAS::Map AMDGPUPrivIsZeroDefIsGenMap = {
4, // Default
1, // opencl_global
3, // opencl_local
@@ -2059,7 +2059,7 @@ static const LangAS::Map AMDGPUNonOpenCLPrivateIsZeroMap = {
2, // cuda_constant
3 // cuda_shared
};
-static const LangAS::Map AMDGPUNonOpenCLGenericIsZeroMap = {
+static const LangAS::Map AMDGPUGenIsZeroDefIsGenMap = {
0, // Default
1, // opencl_global
3, // opencl_local
@@ -2069,7 +2069,7 @@ static const LangAS::Map AMDGPUNonOpenCLGenericIsZeroMap = {
2, // cuda_constant
3 // cuda_shared
};
-static const LangAS::Map AMDGPUOpenCLPrivateIsZeroMap = {
+static const LangAS::Map AMDGPUPrivIsZeroDefIsPrivMap = {
0, // Default
1, // opencl_global
3, // opencl_local
@@ -2079,7 +2079,7 @@ static const LangAS::Map AMDGPUOpenCLPrivateIsZeroMap = {
2, // cuda_constant
3 // cuda_shared
};
-static const LangAS::Map AMDGPUOpenCLGenericIsZeroMap = {
+static const LangAS::Map AMDGPUGenIsZeroDefIsPrivMap = {
5, // Default
1, // opencl_global
3, // opencl_local
@@ -2184,20 +2184,28 @@ public:
: DataLayoutStringR600);
assert(DataLayout->getAllocaAddrSpace() == AS.Private);
+ setAddressSpaceMap(Triple.getOS() == llvm::Triple::Mesa3D ||
+ Triple.getEnvironment() == llvm::Triple::OpenCL ||
+ Triple.getEnvironmentName() == "amdgizcl" ||
+ !isAMDGCN(Triple));
UseAddrSpaceMapMangling = true;
}
- void adjust(LangOptions &Opts) override {
- TargetInfo::adjust(Opts);
+ void setAddressSpaceMap(bool DefaultIsPrivate) {
if (isGenericZero(getTriple())) {
- AddrSpaceMap = Opts.OpenCL ? &AMDGPUOpenCLGenericIsZeroMap
- : &AMDGPUNonOpenCLGenericIsZeroMap;
+ AddrSpaceMap = DefaultIsPrivate ? &AMDGPUGenIsZeroDefIsPrivMap
+ : &AMDGPUGenIsZeroDefIsGenMap;
} else {
- AddrSpaceMap = Opts.OpenCL ? &AMDGPUOpenCLPrivateIsZeroMap
- : &AMDGPUNonOpenCLPrivateIsZeroMap;
+ AddrSpaceMap = DefaultIsPrivate ? &AMDGPUPrivIsZeroDefIsPrivMap
+ : &AMDGPUPrivIsZeroDefIsGenMap;
}
}
+ void adjust(LangOptions &Opts) override {
+ TargetInfo::adjust(Opts);
+ setAddressSpaceMap(Opts.OpenCL || !isAMDGCN(getTriple()));
+ }
+
uint64_t getPointerWidthV(unsigned AddrSpace) const override {
if (GPU <= GK_CAYMAN)
return 32;