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authorUriel Korach <uriel.korach@intel.com>2017-11-13 12:50:52 +0000
committerUriel Korach <uriel.korach@intel.com>2017-11-13 12:50:52 +0000
commit29cede07786e4a8b41b0a72e7f5ac50932fffcb0 (patch)
tree91f59d11c4cc11100474eb0404ead24a46ce43d5 /lib/Headers/avx512vlbwintrin.h
parent5ae0ef1c7fbfcecb187e0dd75f50f572d588898d (diff)
[X86] test/testn intrinsics lowering to IR. clang side
Change Header files of the intrinsics for lowering test and testn intrinsics to IR code. Removed test and testn builtins from clang Differential Revision: https://reviews.llvm.org/D38737 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318035 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Headers/avx512vlbwintrin.h')
-rw-r--r--lib/Headers/avx512vlbwintrin.h67
1 files changed, 27 insertions, 40 deletions
diff --git a/lib/Headers/avx512vlbwintrin.h b/lib/Headers/avx512vlbwintrin.h
index 2196a45a26..e940e2b685 100644
--- a/lib/Headers/avx512vlbwintrin.h
+++ b/lib/Headers/avx512vlbwintrin.h
@@ -2415,121 +2415,108 @@ _mm256_mask_storeu_epi8 (void *__P, __mmask32 __U, __m256i __A)
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm_test_epi8_mask (__m128i __A, __m128i __B)
{
- return (__mmask16) __builtin_ia32_ptestmb128 ((__v16qi) __A,
- (__v16qi) __B,
- (__mmask16) -1);
+ return _mm_cmpneq_epi8_mask (_mm_and_si128(__A, __B), _mm_setzero_hi());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm_mask_test_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B)
{
- return (__mmask16) __builtin_ia32_ptestmb128 ((__v16qi) __A,
- (__v16qi) __B, __U);
+ return _mm_mask_cmpneq_epi8_mask (__U, _mm_and_si128 (__A, __B),
+ _mm_setzero_hi());
}
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
_mm256_test_epi8_mask (__m256i __A, __m256i __B)
{
- return (__mmask32) __builtin_ia32_ptestmb256 ((__v32qi) __A,
- (__v32qi) __B,
- (__mmask32) -1);
+ return _mm256_cmpneq_epi8_mask (_mm256_and_si256(__A, __B),
+ _mm256_setzero_si256());
}
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
_mm256_mask_test_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)
{
- return (__mmask32) __builtin_ia32_ptestmb256 ((__v32qi) __A,
- (__v32qi) __B, __U);
+ return _mm256_mask_cmpneq_epi8_mask (__U, _mm256_and_si256(__A, __B),
+ _mm256_setzero_si256());
}
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
_mm_test_epi16_mask (__m128i __A, __m128i __B)
{
- return (__mmask8) __builtin_ia32_ptestmw128 ((__v8hi) __A,
- (__v8hi) __B,
- (__mmask8) -1);
+ return _mm_cmpneq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_hi());
}
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
_mm_mask_test_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
- return (__mmask8) __builtin_ia32_ptestmw128 ((__v8hi) __A,
- (__v8hi) __B, __U);
+ return _mm_mask_cmpneq_epi16_mask (__U, _mm_and_si128 (__A, __B),
+ _mm_setzero_hi());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm256_test_epi16_mask (__m256i __A, __m256i __B)
{
- return (__mmask16) __builtin_ia32_ptestmw256 ((__v16hi) __A,
- (__v16hi) __B,
- (__mmask16) -1);
+ return _mm256_cmpneq_epi16_mask (_mm256_and_si256 (__A, __B),
+ _mm256_setzero_si256 ());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm256_mask_test_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
{
- return (__mmask16) __builtin_ia32_ptestmw256 ((__v16hi) __A,
- (__v16hi) __B, __U);
+ return _mm256_mask_cmpneq_epi16_mask (__U, _mm256_and_si256(__A, __B),
+ _mm256_setzero_si256());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm_testn_epi8_mask (__m128i __A, __m128i __B)
{
- return (__mmask16) __builtin_ia32_ptestnmb128 ((__v16qi) __A,
- (__v16qi) __B,
- (__mmask16) -1);
+ return _mm_cmpeq_epi8_mask (_mm_and_si128 (__A, __B), _mm_setzero_hi());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm_mask_testn_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B)
{
- return (__mmask16) __builtin_ia32_ptestnmb128 ((__v16qi) __A,
- (__v16qi) __B, __U);
+ return _mm_mask_cmpeq_epi8_mask (__U, _mm_and_si128 (__A, __B),
+ _mm_setzero_hi());
}
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
_mm256_testn_epi8_mask (__m256i __A, __m256i __B)
{
- return (__mmask32) __builtin_ia32_ptestnmb256 ((__v32qi) __A,
- (__v32qi) __B,
- (__mmask32) -1);
+ return _mm256_cmpeq_epi8_mask (_mm256_and_si256 (__A, __B),
+ _mm256_setzero_si256());
}
static __inline__ __mmask32 __DEFAULT_FN_ATTRS
_mm256_mask_testn_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)
{
- return (__mmask32) __builtin_ia32_ptestnmb256 ((__v32qi) __A,
- (__v32qi) __B, __U);
+ return _mm256_mask_cmpeq_epi8_mask (__U, _mm256_and_si256 (__A, __B),
+ _mm256_setzero_si256());
}
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
_mm_testn_epi16_mask (__m128i __A, __m128i __B)
{
- return (__mmask8) __builtin_ia32_ptestnmw128 ((__v8hi) __A,
- (__v8hi) __B,
- (__mmask8) -1);
+ return _mm_cmpeq_epi16_mask (_mm_and_si128 (__A, __B), _mm_setzero_hi());
}
static __inline__ __mmask8 __DEFAULT_FN_ATTRS
_mm_mask_testn_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
- return (__mmask8) __builtin_ia32_ptestnmw128 ((__v8hi) __A,
- (__v8hi) __B, __U);
+ return _mm_mask_cmpeq_epi16_mask (__U, _mm_and_si128(__A, __B), _mm_setzero_hi());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm256_testn_epi16_mask (__m256i __A, __m256i __B)
{
- return (__mmask16) __builtin_ia32_ptestnmw256 ((__v16hi) __A,
- (__v16hi) __B,
- (__mmask16) -1);
+ return _mm256_cmpeq_epi16_mask (_mm256_and_si256(__A, __B),
+ _mm256_setzero_si256());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS
_mm256_mask_testn_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
{
- return (__mmask16) __builtin_ia32_ptestnmw256 ((__v16hi) __A,
- (__v16hi) __B, __U);
+ return _mm256_mask_cmpeq_epi16_mask (__U, _mm256_and_si256 (__A, __B),
+ _mm256_setzero_si256());
}
static __inline__ __mmask16 __DEFAULT_FN_ATTRS