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| author | Craig Topper <craig.topper@gmail.com> | 2016-10-22 21:24:48 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-10-22 21:24:48 +0000 |
| commit | 3f7a3960e4bb617e60140dbbd9e839297979da88 (patch) | |
| tree | a6f4f3235510682af59362ff8d59582520c86064 /lib/Headers/avx512vlbwintrin.h | |
| parent | 3f2396d40078369f36173478e7380d3694e52565 (diff) | |
[AVX-512] Replace masked 128/256-bit vpmovzx/vpmovsx builtins with native IR.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284927 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Headers/avx512vlbwintrin.h')
| -rw-r--r-- | lib/Headers/avx512vlbwintrin.h | 66 |
1 files changed, 31 insertions, 35 deletions
diff --git a/lib/Headers/avx512vlbwintrin.h b/lib/Headers/avx512vlbwintrin.h index 421ed89ee2..f5fa43479d 100644 --- a/lib/Headers/avx512vlbwintrin.h +++ b/lib/Headers/avx512vlbwintrin.h @@ -2234,72 +2234,68 @@ _mm256_maskz_unpacklo_epi16(__mmask16 __U, __m256i __A, __m256i __B) { } static __inline__ __m128i __DEFAULT_FN_ATTRS -_mm_mask_cvtepi8_epi16 (__m128i __W, __mmask32 __U, __m128i __A) +_mm_mask_cvtepi8_epi16(__m128i __W, __mmask8 __U, __m128i __A) { - return (__m128i) __builtin_ia32_pmovsxbw128_mask ((__v16qi) __A, - (__v8hi) __W, - (__mmask8) __U); + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepi8_epi16(__A), + (__v8hi)__W); } static __inline__ __m128i __DEFAULT_FN_ATTRS -_mm_maskz_cvtepi8_epi16 (__mmask8 __U, __m128i __A) +_mm_maskz_cvtepi8_epi16(__mmask8 __U, __m128i __A) { - return (__m128i) __builtin_ia32_pmovsxbw128_mask ((__v16qi) __A, - (__v8hi) - _mm_setzero_si128 (), - (__mmask8) __U); + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepi8_epi16(__A), + (__v8hi)_mm_setzero_si128()); } static __inline__ __m256i __DEFAULT_FN_ATTRS -_mm256_mask_cvtepi8_epi16 (__m256i __W, __mmask32 __U, __m128i __A) +_mm256_mask_cvtepi8_epi16(__m256i __W, __mmask16 __U, __m128i __A) { - return (__m256i) __builtin_ia32_pmovsxbw256_mask ((__v16qi) __A, - (__v16hi) __W, - (__mmask16) __U); + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepi8_epi16(__A), + (__v16hi)__W); } static __inline__ __m256i __DEFAULT_FN_ATTRS -_mm256_maskz_cvtepi8_epi16 (__mmask16 __U, __m128i __A) +_mm256_maskz_cvtepi8_epi16(__mmask16 __U, __m128i __A) { - return (__m256i) __builtin_ia32_pmovsxbw256_mask ((__v16qi) __A, - (__v16hi) - _mm256_setzero_si256 (), - (__mmask16) __U); + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepi8_epi16(__A), + (__v16hi)_mm256_setzero_si256()); } static __inline__ __m128i __DEFAULT_FN_ATTRS -_mm_mask_cvtepu8_epi16 (__m128i __W, __mmask32 __U, __m128i __A) +_mm_mask_cvtepu8_epi16(__m128i __W, __mmask8 __U, __m128i __A) { - return (__m128i) __builtin_ia32_pmovzxbw128_mask ((__v16qi) __A, - (__v8hi) __W, - (__mmask8) __U); + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepu8_epi16(__A), + (__v8hi)__W); } static __inline__ __m128i __DEFAULT_FN_ATTRS -_mm_maskz_cvtepu8_epi16 (__mmask8 __U, __m128i __A) +_mm_maskz_cvtepu8_epi16(__mmask8 __U, __m128i __A) { - return (__m128i) __builtin_ia32_pmovzxbw128_mask ((__v16qi) __A, - (__v8hi) - _mm_setzero_si128 (), - (__mmask8) __U); + return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U, + (__v8hi)_mm_cvtepu8_epi16(__A), + (__v8hi)_mm_setzero_si128()); } static __inline__ __m256i __DEFAULT_FN_ATTRS -_mm256_mask_cvtepu8_epi16 (__m256i __W, __mmask32 __U, __m128i __A) +_mm256_mask_cvtepu8_epi16(__m256i __W, __mmask16 __U, __m128i __A) { - return (__m256i) __builtin_ia32_pmovzxbw256_mask ((__v16qi) __A, - (__v16hi) __W, - (__mmask16) __U); + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepu8_epi16(__A), + (__v16hi)__W); } static __inline__ __m256i __DEFAULT_FN_ATTRS _mm256_maskz_cvtepu8_epi16 (__mmask16 __U, __m128i __A) { - return (__m256i) __builtin_ia32_pmovzxbw256_mask ((__v16qi) __A, - (__v16hi) - _mm256_setzero_si256 (), - (__mmask16) __U); + return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U, + (__v16hi)_mm256_cvtepu8_epi16(__A), + (__v16hi)_mm256_setzero_si256()); } |