diff options
author | Sirish Pande <spande@codeaurora.org> | 2012-04-16 17:04:05 +0000 |
---|---|---|
committer | Sirish Pande <spande@codeaurora.org> | 2012-04-16 17:04:05 +0000 |
commit | 7ac715fd3118362f14574c312b044d22e3afeee9 (patch) | |
tree | d58e64d1d0b615f704d1fe32b6e653924bbab16a /lib | |
parent | 48c2407861526291ea8aeb2083537fc0576b7a8e (diff) |
Hexagon V5(Floating Point) support.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@154828 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Basic/Targets.cpp | 13 | ||||
-rw-r--r-- | lib/CodeGen/CGBuiltin.cpp | 904 | ||||
-rw-r--r-- | lib/Driver/Tools.cpp | 6 |
3 files changed, 766 insertions, 157 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 1ad37c4e57..5856d1ddfc 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -3015,8 +3015,8 @@ public: HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) { BigEndian = false; DescriptionString = ("e-p:32:32:32-" - "i64:64:64-i32:32:32-" - "i16:16:16-i1:32:32-a:0:0"); + "i64:64:64-i32:32:32-i16:16:16-i1:32:32" + "f64:64:64-f32:32:32-a0:0-n32"); // {} in inline assembly are packet specifiers, not assembly variant // specifiers. @@ -3057,6 +3057,7 @@ public: .Case("hexagonv2", "2") .Case("hexagonv3", "3") .Case("hexagonv4", "4") + .Case("hexagonv5", "5") .Default(0); } @@ -3111,6 +3112,14 @@ void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("__QDSP6_ARCH__", "4"); } } + else if(CPU == "hexagonv5") { + Builder.defineMacro("__HEXAGON_V5__"); + Builder.defineMacro("__HEXAGON_ARCH__", "5"); + if(Opts.HexagonQdsp6Compat) { + Builder.defineMacro("__QDSP6_V5__"); + Builder.defineMacro("__QDSP6_ARCH__", "5"); + } + } } const char * const HexagonTargetInfo::GCCRegNames[] = { diff --git a/lib/CodeGen/CGBuiltin.cpp b/lib/CodeGen/CGBuiltin.cpp index e30b5136ba..7592f31f1a 100644 --- a/lib/CodeGen/CGBuiltin.cpp +++ b/lib/CodeGen/CGBuiltin.cpp @@ -2460,6 +2460,16 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, switch (BuiltinID) { default: return 0; +// This one below is not generated from the autogenerated iset.py. +// So make sure you donot overwrite this one. + case Hexagon::BI__builtin_SI_to_SXTHI_asrh: + ID = Intrinsic::hexagon_SI_to_SXTHI_asrh; break; + + case Hexagon::BI__builtin_circ_ldd: + ID = Intrinsic::hexagon_circ_ldd; break; +// This one above is not generated from the autogenerated iset.py. +// So make sure you donot overwrite this one. + case Hexagon::BI__builtin_HEXAGON_C2_cmpeq: ID = Intrinsic::hexagon_C2_cmpeq; break; @@ -2478,12 +2488,30 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_C2_cmpgtup: ID = Intrinsic::hexagon_C2_cmpgtup; break; + case Hexagon::BI__builtin_HEXAGON_A4_rcmpeqi: + ID = Intrinsic::hexagon_A4_rcmpeqi; break; + + case Hexagon::BI__builtin_HEXAGON_A4_rcmpneqi: + ID = Intrinsic::hexagon_A4_rcmpneqi; break; + + case Hexagon::BI__builtin_HEXAGON_A4_rcmpeq: + ID = Intrinsic::hexagon_A4_rcmpeq; break; + + case Hexagon::BI__builtin_HEXAGON_A4_rcmpneq: + ID = Intrinsic::hexagon_A4_rcmpneq; break; + case Hexagon::BI__builtin_HEXAGON_C2_bitsset: ID = Intrinsic::hexagon_C2_bitsset; break; case Hexagon::BI__builtin_HEXAGON_C2_bitsclr: ID = Intrinsic::hexagon_C2_bitsclr; break; + case Hexagon::BI__builtin_HEXAGON_C4_nbitsset: + ID = Intrinsic::hexagon_C4_nbitsset; break; + + case Hexagon::BI__builtin_HEXAGON_C4_nbitsclr: + ID = Intrinsic::hexagon_C4_nbitsclr; break; + case Hexagon::BI__builtin_HEXAGON_C2_cmpeqi: ID = Intrinsic::hexagon_C2_cmpeqi; break; @@ -2508,6 +2536,27 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_C2_bitsclri: ID = Intrinsic::hexagon_C2_bitsclri; break; + case Hexagon::BI__builtin_HEXAGON_C4_nbitsclri: + ID = Intrinsic::hexagon_C4_nbitsclri; break; + + case Hexagon::BI__builtin_HEXAGON_C4_cmpneqi: + ID = Intrinsic::hexagon_C4_cmpneqi; break; + + case Hexagon::BI__builtin_HEXAGON_C4_cmpltei: + ID = Intrinsic::hexagon_C4_cmpltei; break; + + case Hexagon::BI__builtin_HEXAGON_C4_cmplteui: + ID = Intrinsic::hexagon_C4_cmplteui; break; + + case Hexagon::BI__builtin_HEXAGON_C4_cmpneq: + ID = Intrinsic::hexagon_C4_cmpneq; break; + + case Hexagon::BI__builtin_HEXAGON_C4_cmplte: + ID = Intrinsic::hexagon_C4_cmplte; break; + + case Hexagon::BI__builtin_HEXAGON_C4_cmplteu: + ID = Intrinsic::hexagon_C4_cmplteu; break; + case Hexagon::BI__builtin_HEXAGON_C2_and: ID = Intrinsic::hexagon_C2_and; break; @@ -2526,6 +2575,30 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_C2_orn: ID = Intrinsic::hexagon_C2_orn; break; + case Hexagon::BI__builtin_HEXAGON_C4_and_and: + ID = Intrinsic::hexagon_C4_and_and; break; + + case Hexagon::BI__builtin_HEXAGON_C4_and_or: + ID = Intrinsic::hexagon_C4_and_or; break; + + case Hexagon::BI__builtin_HEXAGON_C4_or_and: + ID = Intrinsic::hexagon_C4_or_and; break; + + case Hexagon::BI__builtin_HEXAGON_C4_or_or: + ID = Intrinsic::hexagon_C4_or_or; break; + + case Hexagon::BI__builtin_HEXAGON_C4_and_andn: + ID = Intrinsic::hexagon_C4_and_andn; break; + + case Hexagon::BI__builtin_HEXAGON_C4_and_orn: + ID = Intrinsic::hexagon_C4_and_orn; break; + + case Hexagon::BI__builtin_HEXAGON_C4_or_andn: + ID = Intrinsic::hexagon_C4_or_andn; break; + + case Hexagon::BI__builtin_HEXAGON_C4_or_orn: + ID = Intrinsic::hexagon_C4_or_orn; break; + case Hexagon::BI__builtin_HEXAGON_C2_pxfer_map: ID = Intrinsic::hexagon_C2_pxfer_map; break; @@ -2559,9 +2632,42 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vcmpbeq: ID = Intrinsic::hexagon_A2_vcmpbeq; break; + case Hexagon::BI__builtin_HEXAGON_A4_vcmpbeqi: + ID = Intrinsic::hexagon_A4_vcmpbeqi; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vcmpbeq_any: + ID = Intrinsic::hexagon_A4_vcmpbeq_any; break; + case Hexagon::BI__builtin_HEXAGON_A2_vcmpbgtu: ID = Intrinsic::hexagon_A2_vcmpbgtu; break; + case Hexagon::BI__builtin_HEXAGON_A4_vcmpbgtui: + ID = Intrinsic::hexagon_A4_vcmpbgtui; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vcmpbgt: + ID = Intrinsic::hexagon_A4_vcmpbgt; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vcmpbgti: + ID = Intrinsic::hexagon_A4_vcmpbgti; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpbeq: + ID = Intrinsic::hexagon_A4_cmpbeq; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpbeqi: + ID = Intrinsic::hexagon_A4_cmpbeqi; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpbgtu: + ID = Intrinsic::hexagon_A4_cmpbgtu; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpbgtui: + ID = Intrinsic::hexagon_A4_cmpbgtui; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpbgt: + ID = Intrinsic::hexagon_A4_cmpbgt; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpbgti: + ID = Intrinsic::hexagon_A4_cmpbgti; break; + case Hexagon::BI__builtin_HEXAGON_A2_vcmpheq: ID = Intrinsic::hexagon_A2_vcmpheq; break; @@ -2571,6 +2677,33 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vcmphgtu: ID = Intrinsic::hexagon_A2_vcmphgtu; break; + case Hexagon::BI__builtin_HEXAGON_A4_vcmpheqi: + ID = Intrinsic::hexagon_A4_vcmpheqi; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vcmphgti: + ID = Intrinsic::hexagon_A4_vcmphgti; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vcmphgtui: + ID = Intrinsic::hexagon_A4_vcmphgtui; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpheq: + ID = Intrinsic::hexagon_A4_cmpheq; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmphgt: + ID = Intrinsic::hexagon_A4_cmphgt; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmphgtu: + ID = Intrinsic::hexagon_A4_cmphgtu; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmpheqi: + ID = Intrinsic::hexagon_A4_cmpheqi; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmphgti: + ID = Intrinsic::hexagon_A4_cmphgti; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cmphgtui: + ID = Intrinsic::hexagon_A4_cmphgtui; break; + case Hexagon::BI__builtin_HEXAGON_A2_vcmpweq: ID = Intrinsic::hexagon_A2_vcmpweq; break; @@ -2580,12 +2713,33 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vcmpwgtu: ID = Intrinsic::hexagon_A2_vcmpwgtu; break; + case Hexagon::BI__builtin_HEXAGON_A4_vcmpweqi: + ID = Intrinsic::hexagon_A4_vcmpweqi; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vcmpwgti: + ID = Intrinsic::hexagon_A4_vcmpwgti; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vcmpwgtui: + ID = Intrinsic::hexagon_A4_vcmpwgtui; break; + + case Hexagon::BI__builtin_HEXAGON_A4_boundscheck: + ID = Intrinsic::hexagon_A4_boundscheck; break; + + case Hexagon::BI__builtin_HEXAGON_A4_tlbmatch: + ID = Intrinsic::hexagon_A4_tlbmatch; break; + case Hexagon::BI__builtin_HEXAGON_C2_tfrpr: ID = Intrinsic::hexagon_C2_tfrpr; break; case Hexagon::BI__builtin_HEXAGON_C2_tfrrp: ID = Intrinsic::hexagon_C2_tfrrp; break; + case Hexagon::BI__builtin_HEXAGON_C4_fastcorner9: + ID = Intrinsic::hexagon_C4_fastcorner9; break; + + case Hexagon::BI__builtin_HEXAGON_C4_fastcorner9_not: + ID = Intrinsic::hexagon_C4_fastcorner9_not; break; + case Hexagon::BI__builtin_HEXAGON_M2_mpy_acc_hh_s0: ID = Intrinsic::hexagon_M2_mpy_acc_hh_s0; break; @@ -3048,12 +3202,27 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_M2_mpy_up: ID = Intrinsic::hexagon_M2_mpy_up; break; + case Hexagon::BI__builtin_HEXAGON_M2_mpy_up_s1: + ID = Intrinsic::hexagon_M2_mpy_up_s1; break; + + case Hexagon::BI__builtin_HEXAGON_M2_mpy_up_s1_sat: + ID = Intrinsic::hexagon_M2_mpy_up_s1_sat; break; + case Hexagon::BI__builtin_HEXAGON_M2_mpyu_up: ID = Intrinsic::hexagon_M2_mpyu_up; break; + case Hexagon::BI__builtin_HEXAGON_M2_mpysu_up: + ID = Intrinsic::hexagon_M2_mpysu_up; break; + case Hexagon::BI__builtin_HEXAGON_M2_dpmpyss_rnd_s0: ID = Intrinsic::hexagon_M2_dpmpyss_rnd_s0; break; + case Hexagon::BI__builtin_HEXAGON_M4_mac_up_s1_sat: + ID = Intrinsic::hexagon_M4_mac_up_s1_sat; break; + + case Hexagon::BI__builtin_HEXAGON_M4_nac_up_s1_sat: + ID = Intrinsic::hexagon_M4_nac_up_s1_sat; break; + case Hexagon::BI__builtin_HEXAGON_M2_mpyi: ID = Intrinsic::hexagon_M2_mpyi; break; @@ -3078,6 +3247,21 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_M2_subacc: ID = Intrinsic::hexagon_M2_subacc; break; + case Hexagon::BI__builtin_HEXAGON_M4_mpyrr_addr: + ID = Intrinsic::hexagon_M4_mpyrr_addr; break; + + case Hexagon::BI__builtin_HEXAGON_M4_mpyri_addr_u2: + ID = Intrinsic::hexagon_M4_mpyri_addr_u2; break; + + case Hexagon::BI__builtin_HEXAGON_M4_mpyri_addr: + ID = Intrinsic::hexagon_M4_mpyri_addr; break; + + case Hexagon::BI__builtin_HEXAGON_M4_mpyri_addi: + ID = Intrinsic::hexagon_M4_mpyri_addi; break; + + case Hexagon::BI__builtin_HEXAGON_M4_mpyrr_addi: + ID = Intrinsic::hexagon_M4_mpyrr_addi; break; + case Hexagon::BI__builtin_HEXAGON_M2_vmpy2s_s0: ID = Intrinsic::hexagon_M2_vmpy2s_s0; break; @@ -3090,6 +3274,18 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_M2_vmac2s_s1: ID = Intrinsic::hexagon_M2_vmac2s_s1; break; + case Hexagon::BI__builtin_HEXAGON_M2_vmpy2su_s0: + ID = Intrinsic::hexagon_M2_vmpy2su_s0; break; + + case Hexagon::BI__builtin_HEXAGON_M2_vmpy2su_s1: + ID = Intrinsic::hexagon_M2_vmpy2su_s1; break; + + case Hexagon::BI__builtin_HEXAGON_M2_vmac2su_s0: + ID = Intrinsic::hexagon_M2_vmac2su_s0; break; + + case Hexagon::BI__builtin_HEXAGON_M2_vmac2su_s1: + ID = Intrinsic::hexagon_M2_vmac2su_s1; break; + case Hexagon::BI__builtin_HEXAGON_M2_vmpy2s_s0pack: ID = Intrinsic::hexagon_M2_vmpy2s_s0pack; break; @@ -3126,6 +3322,36 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_M2_vdmpyrs_s1: ID = Intrinsic::hexagon_M2_vdmpyrs_s1; break; + case Hexagon::BI__builtin_HEXAGON_M5_vrmpybuu: + ID = Intrinsic::hexagon_M5_vrmpybuu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vrmacbuu: + ID = Intrinsic::hexagon_M5_vrmacbuu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vrmpybsu: + ID = Intrinsic::hexagon_M5_vrmpybsu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vrmacbsu: + ID = Intrinsic::hexagon_M5_vrmacbsu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vmpybuu: + ID = Intrinsic::hexagon_M5_vmpybuu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vmpybsu: + ID = Intrinsic::hexagon_M5_vmpybsu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vmacbuu: + ID = Intrinsic::hexagon_M5_vmacbuu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vmacbsu: + ID = Intrinsic::hexagon_M5_vmacbsu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vdmpybsu: + ID = Intrinsic::hexagon_M5_vdmpybsu; break; + + case Hexagon::BI__builtin_HEXAGON_M5_vdmacbsu: + ID = Intrinsic::hexagon_M5_vdmacbsu; break; + case Hexagon::BI__builtin_HEXAGON_M2_vdmacs_s0: ID = Intrinsic::hexagon_M2_vdmacs_s0; break; @@ -3243,12 +3469,42 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_M2_mmpyh_rs1: ID = Intrinsic::hexagon_M2_mmpyh_rs1; break; + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyeh_s0: + ID = Intrinsic::hexagon_M4_vrmpyeh_s0; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyeh_s1: + ID = Intrinsic::hexagon_M4_vrmpyeh_s1; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyeh_acc_s0: + ID = Intrinsic::hexagon_M4_vrmpyeh_acc_s0; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyeh_acc_s1: + ID = Intrinsic::hexagon_M4_vrmpyeh_acc_s1; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyoh_s0: + ID = Intrinsic::hexagon_M4_vrmpyoh_s0; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyoh_s1: + ID = Intrinsic::hexagon_M4_vrmpyoh_s1; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyoh_acc_s0: + ID = Intrinsic::hexagon_M4_vrmpyoh_acc_s0; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vrmpyoh_acc_s1: + ID = Intrinsic::hexagon_M4_vrmpyoh_acc_s1; break; + case Hexagon::BI__builtin_HEXAGON_M2_hmmpyl_rs1: ID = Intrinsic::hexagon_M2_hmmpyl_rs1; break; case Hexagon::BI__builtin_HEXAGON_M2_hmmpyh_rs1: ID = Intrinsic::hexagon_M2_hmmpyh_rs1; break; + case Hexagon::BI__builtin_HEXAGON_M2_hmmpyl_s1: + ID = Intrinsic::hexagon_M2_hmmpyl_s1; break; + + case Hexagon::BI__builtin_HEXAGON_M2_hmmpyh_s1: + ID = Intrinsic::hexagon_M2_hmmpyh_s1; break; + case Hexagon::BI__builtin_HEXAGON_M2_mmaculs_s0: ID = Intrinsic::hexagon_M2_mmaculs_s0; break; @@ -3333,6 +3589,18 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_M2_cmpyr_s0: ID = Intrinsic::hexagon_M2_cmpyr_s0; break; + case Hexagon::BI__builtin_HEXAGON_M4_cmpyi_wh: + ID = Intrinsic::hexagon_M4_cmpyi_wh; break; + + case Hexagon::BI__builtin_HEXAGON_M4_cmpyr_wh: + ID = Intrinsic::hexagon_M4_cmpyr_wh; break; + + case Hexagon::BI__builtin_HEXAGON_M4_cmpyi_whc: + ID = Intrinsic::hexagon_M4_cmpyi_whc; break; + + case Hexagon::BI__builtin_HEXAGON_M4_cmpyr_whc: + ID = Intrinsic::hexagon_M4_cmpyr_whc; break; + case Hexagon::BI__builtin_HEXAGON_M2_vcmpy_s0_sat_i: ID = Intrinsic::hexagon_M2_vcmpy_s0_sat_i; break; @@ -3354,6 +3622,30 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_vcrotate: ID = Intrinsic::hexagon_S2_vcrotate; break; + case Hexagon::BI__builtin_HEXAGON_S4_vrcrotate_acc: + ID = Intrinsic::hexagon_S4_vrcrotate_acc; break; + + case Hexagon::BI__builtin_HEXAGON_S4_vrcrotate: + ID = Intrinsic::hexagon_S4_vrcrotate; break; + + case Hexagon::BI__builtin_HEXAGON_S2_vcnegh: + ID = Intrinsic::hexagon_S2_vcnegh; break; + + case Hexagon::BI__builtin_HEXAGON_S2_vrcnegh: + ID = Intrinsic::hexagon_S2_vrcnegh; break; + + case Hexagon::BI__builtin_HEXAGON_M4_pmpyw: + ID = Intrinsic::hexagon_M4_pmpyw; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vpmpyh: + ID = Intrinsic::hexagon_M4_vpmpyh; break; + + case Hexagon::BI__builtin_HEXAGON_M4_pmpyw_acc: + ID = Intrinsic::hexagon_M4_pmpyw_acc; break; + + case Hexagon::BI__builtin_HEXAGON_M4_vpmpyh_acc: + ID = Intrinsic::hexagon_M4_vpmpyh_acc; break; + case Hexagon::BI__builtin_HEXAGON_A2_add: ID = Intrinsic::hexagon_A2_add; break; @@ -3531,6 +3823,12 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_combinew: ID = Intrinsic::hexagon_A2_combinew; break; + case Hexagon::BI__builtin_HEXAGON_A4_combineri: + ID = Intrinsic::hexagon_A4_combineri; break; + + case Hexagon::BI__builtin_HEXAGON_A4_combineir: + ID = Intrinsic::hexagon_A4_combineir; break; + case Hexagon::BI__builtin_HEXAGON_A2_combineii: ID = Intrinsic::hexagon_A2_combineii; break; @@ -3567,6 +3865,69 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_M2_xor_xacc: ID = Intrinsic::hexagon_M2_xor_xacc; break; + case Hexagon::BI__builtin_HEXAGON_M4_xor_xacc: + ID = Intrinsic::hexagon_M4_xor_xacc; break; + + case Hexagon::BI__builtin_HEXAGON_A4_andn: + ID = Intrinsic::hexagon_A4_andn; break; + + case Hexagon::BI__builtin_HEXAGON_A4_orn: + ID = Intrinsic::hexagon_A4_orn; break; + + case Hexagon::BI__builtin_HEXAGON_A4_andnp: + ID = Intrinsic::hexagon_A4_andnp; break; + + case Hexagon::BI__builtin_HEXAGON_A4_ornp: + ID = Intrinsic::hexagon_A4_ornp; break; + + case Hexagon::BI__builtin_HEXAGON_S4_addaddi: + ID = Intrinsic::hexagon_S4_addaddi; break; + + case Hexagon::BI__builtin_HEXAGON_S4_subaddi: + ID = Intrinsic::hexagon_S4_subaddi; break; + + case Hexagon::BI__builtin_HEXAGON_M4_and_and: + ID = Intrinsic::hexagon_M4_and_and; break; + + case Hexagon::BI__builtin_HEXAGON_M4_and_andn: + ID = Intrinsic::hexagon_M4_and_andn; break; + + case Hexagon::BI__builtin_HEXAGON_M4_and_or: + ID = Intrinsic::hexagon_M4_and_or; break; + + case Hexagon::BI__builtin_HEXAGON_M4_and_xor: + ID = Intrinsic::hexagon_M4_and_xor; break; + + case Hexagon::BI__builtin_HEXAGON_M4_or_and: + ID = Intrinsic::hexagon_M4_or_and; break; + + case Hexagon::BI__builtin_HEXAGON_M4_or_andn: + ID = Intrinsic::hexagon_M4_or_andn; break; + + case Hexagon::BI__builtin_HEXAGON_M4_or_or: + ID = Intrinsic::hexagon_M4_or_or; break; + + case Hexagon::BI__builtin_HEXAGON_M4_or_xor: + ID = Intrinsic::hexagon_M4_or_xor; break; + + case Hexagon::BI__builtin_HEXAGON_S4_or_andix: + ID = Intrinsic::hexagon_S4_or_andix; break; + + case Hexagon::BI__builtin_HEXAGON_S4_or_andi: + ID = Intrinsic::hexagon_S4_or_andi; break; + + case Hexagon::BI__builtin_HEXAGON_S4_or_ori: + ID = Intrinsic::hexagon_S4_or_ori; break; + + case Hexagon::BI__builtin_HEXAGON_M4_xor_and: + ID = Intrinsic::hexagon_M4_xor_and; break; + + case Hexagon::BI__builtin_HEXAGON_M4_xor_or: + ID = Intrinsic::hexagon_M4_xor_or; break; + + case Hexagon::BI__builtin_HEXAGON_M4_xor_andn: + ID = Intrinsic::hexagon_M4_xor_andn; break; + case Hexagon::BI__builtin_HEXAGON_A2_subri: ID = Intrinsic::hexagon_A2_subri; break; @@ -3594,6 +3955,9 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_sat: ID = Intrinsic::hexagon_A2_sat; break; + case Hexagon::BI__builtin_HEXAGON_A2_roundsat: + ID = Intrinsic::hexagon_A2_roundsat; break; + case Hexagon::BI__builtin_HEXAGON_A2_sath: ID = Intrinsic::hexagon_A2_sath; break; @@ -3609,6 +3973,9 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vaddub: ID = Intrinsic::hexagon_A2_vaddub; break; + case Hexagon::BI__builtin_HEXAGON_A2_vaddb_map: + ID = Intrinsic::hexagon_A2_vaddb_map; break; + case Hexagon::BI__builtin_HEXAGON_A2_vaddubs: ID = Intrinsic::hexagon_A2_vaddubs; break; @@ -3621,12 +3988,33 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vadduhs: ID = Intrinsic::hexagon_A2_vadduhs; break; + case Hexagon::BI__builtin_HEXAGON_A5_vaddhubs: + ID = Intrinsic::hexagon_A5_vaddhubs; break; + case Hexagon::BI__builtin_HEXAGON_A2_vaddw: ID = Intrinsic::hexagon_A2_vaddw; break; case Hexagon::BI__builtin_HEXAGON_A2_vaddws: ID = Intrinsic::hexagon_A2_vaddws; break; + case Hexagon::BI__builtin_HEXAGON_S4_vxaddsubw: + ID = Intrinsic::hexagon_S4_vxaddsubw; break; + + case Hexagon::BI__builtin_HEXAGON_S4_vxsubaddw: + ID = Intrinsic::hexagon_S4_vxsubaddw; break; + + case Hexagon::BI__builtin_HEXAGON_S4_vxaddsubh: + ID = Intrinsic::hexagon_S4_vxaddsubh; break; + + case Hexagon::BI__builtin_HEXAGON_S4_vxsubaddh: + ID = Intrinsic::hexagon_S4_vxsubaddh; break; + + case Hexagon::BI__builtin_HEXAGON_S4_vxaddsubhr: + ID = Intrinsic::hexagon_S4_vxaddsubhr; break; + + case Hexagon::BI__builtin_HEXAGON_S4_vxsubaddhr: + ID = Intrinsic::hexagon_S4_vxsubaddhr; break; + case Hexagon::BI__builtin_HEXAGON_A2_svavgh: ID = Intrinsic::hexagon_A2_svavgh; break; @@ -3660,12 +4048,18 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vraddub_acc: ID = Intrinsic::hexagon_A2_vraddub_acc; break; + case Hexagon::BI__builtin_HEXAGON_M2_vraddh: + ID = Intrinsic::hexagon_M2_vraddh; break; + case Hexagon::BI__builtin_HEXAGON_M2_vradduh: ID = Intrinsic::hexagon_M2_vradduh; break; case Hexagon::BI__builtin_HEXAGON_A2_vsubub: ID = Intrinsic::hexagon_A2_vsubub; break; + case Hexagon::BI__builtin_HEXAGON_A2_vsubb_map: + ID = Intrinsic::hexagon_A2_vsubb_map; break; + case Hexagon::BI__builtin_HEXAGON_A2_vsububs: ID = Intrinsic::hexagon_A2_vsububs; break; @@ -3762,11 +4156,53 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vnavghr: ID = Intrinsic::hexagon_A2_vnavghr; break; - case Hexagon::BI__builtin_HEXAGON_A2_vminh: - ID = Intrinsic::hexagon_A2_vminh; break; + case Hexagon::BI__builtin_HEXAGON_A4_round_ri: + ID = Intrinsic::hexagon_A4_round_ri; break; - case Hexagon::BI__builtin_HEXAGON_A2_vmaxh: - ID = Intrinsic::hexagon_A2_vmaxh; break; + case Hexagon::BI__builtin_HEXAGON_A4_round_rr: + ID = Intrinsic::hexagon_A4_round_rr; break; + + case Hexagon::BI__builtin_HEXAGON_A4_round_ri_sat: + ID = Intrinsic::hexagon_A4_round_ri_sat; break; + + case Hexagon::BI__builtin_HEXAGON_A4_round_rr_sat: + ID = Intrinsic::hexagon_A4_round_rr_sat; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cround_ri: + ID = Intrinsic::hexagon_A4_cround_ri; break; + + case Hexagon::BI__builtin_HEXAGON_A4_cround_rr: + ID = Intrinsic::hexagon_A4_cround_rr; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrminh: + ID = Intrinsic::hexagon_A4_vrminh; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrmaxh: + ID = Intrinsic::hexagon_A4_vrmaxh; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrminuh: + ID = Intrinsic::hexagon_A4_vrminuh; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrmaxuh: + ID = Intrinsic::hexagon_A4_vrmaxuh; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrminw: + ID = Intrinsic::hexagon_A4_vrminw; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrmaxw: + ID = Intrinsic::hexagon_A4_vrmaxw; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrminuw: + ID = Intrinsic::hexagon_A4_vrminuw; break; + + case Hexagon::BI__builtin_HEXAGON_A4_vrmaxuw: + ID = Intrinsic::hexagon_A4_vrmaxuw; break; + + case Hexagon::BI__builtin_HEXAGON_A2_vminb: + ID = Intrinsic::hexagon_A2_vminb; break; + + case Hexagon::BI__builtin_HEXAGON_A2_vmaxb: + ID = Intrinsic::hexagon_A2_vmaxb; break; case Hexagon::BI__builtin_HEXAGON_A2_vminub: ID = Intrinsic::hexagon_A2_vminub; break; @@ -3774,6 +4210,12 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vmaxub: ID = Intrinsic::hexagon_A2_vmaxub; break; + case Hexagon::BI__builtin_HEXAGON_A2_vminh: + ID = Intrinsic::hexagon_A2_vminh; break; + + case Hexagon::BI__builtin_HEXAGON_A2_vmaxh: + ID = Intrinsic::hexagon_A2_vmaxh; break; + case Hexagon::BI__builtin_HEXAGON_A2_vminuh: ID = Intrinsic::hexagon_A2_vminuh; break; @@ -3792,6 +4234,207 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_A2_vmaxuw: ID = Intrinsic::hexagon_A2_vmaxuw; break; + case Hexagon::BI__builtin_HEXAGON_A4_modwrapu: + ID = Intrinsic::hexagon_A4_modwrapu; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfadd: + ID = Intrinsic::hexagon_F2_sfadd; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfsub: + ID = Intrinsic::hexagon_F2_sfsub; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfmpy: + ID = Intrinsic::hexagon_F2_sfmpy; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffma: + ID = Intrinsic::hexagon_F2_sffma; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffma_sc: + ID = Intrinsic::hexagon_F2_sffma_sc; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffms: + ID = Intrinsic::hexagon_F2_sffms; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffma_lib: + ID = Intrinsic::hexagon_F2_sffma_lib; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffms_lib: + ID = Intrinsic::hexagon_F2_sffms_lib; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfcmpeq: + ID = Intrinsic::hexagon_F2_sfcmpeq; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfcmpgt: + ID = Intrinsic::hexagon_F2_sfcmpgt; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfcmpge: + ID = Intrinsic::hexagon_F2_sfcmpge; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfcmpuo: + ID = Intrinsic::hexagon_F2_sfcmpuo; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfmax: + ID = Intrinsic::hexagon_F2_sfmax; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfmin: + ID = Intrinsic::hexagon_F2_sfmin; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfclass: + ID = Intrinsic::hexagon_F2_sfclass; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfimm_p: + ID = Intrinsic::hexagon_F2_sfimm_p; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sfimm_n: + ID = Intrinsic::hexagon_F2_sfimm_n; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffixupn: + ID = Intrinsic::hexagon_F2_sffixupn; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffixupd: + ID = Intrinsic::hexagon_F2_sffixupd; break; + + case Hexagon::BI__builtin_HEXAGON_F2_sffixupr: + ID = Intrinsic::hexagon_F2_sffixupr; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfadd: + ID = Intrinsic::hexagon_F2_dfadd; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfsub: + ID = Intrinsic::hexagon_F2_dfsub; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfmpy: + ID = Intrinsic::hexagon_F2_dfmpy; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffma: + ID = Intrinsic::hexagon_F2_dffma; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffms: + ID = Intrinsic::hexagon_F2_dffms; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffma_lib: + ID = Intrinsic::hexagon_F2_dffma_lib; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffms_lib: + ID = Intrinsic::hexagon_F2_dffms_lib; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffma_sc: + ID = Intrinsic::hexagon_F2_dffma_sc; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfmax: + ID = Intrinsic::hexagon_F2_dfmax; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfmin: + ID = Intrinsic::hexagon_F2_dfmin; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfcmpeq: + ID = Intrinsic::hexagon_F2_dfcmpeq; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfcmpgt: + ID = Intrinsic::hexagon_F2_dfcmpgt; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfcmpge: + ID = Intrinsic::hexagon_F2_dfcmpge; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfcmpuo: + ID = Intrinsic::hexagon_F2_dfcmpuo; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfclass: + ID = Intrinsic::hexagon_F2_dfclass; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfimm_p: + ID = Intrinsic::hexagon_F2_dfimm_p; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dfimm_n: + ID = Intrinsic::hexagon_F2_dfimm_n; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffixupn: + ID = Intrinsic::hexagon_F2_dffixupn; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffixupd: + ID = Intrinsic::hexagon_F2_dffixupd; break; + + case Hexagon::BI__builtin_HEXAGON_F2_dffixupr: + ID = Intrinsic::hexagon_F2_dffixupr; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2df: + ID = Intrinsic::hexagon_F2_conv_sf2df; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2sf: + ID = Intrinsic::hexagon_F2_conv_df2sf; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_uw2sf: + ID = Intrinsic::hexagon_F2_conv_uw2sf; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_uw2df: + ID = Intrinsic::hexagon_F2_conv_uw2df; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_w2sf: + ID = Intrinsic::hexagon_F2_conv_w2sf; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_w2df: + ID = Intrinsic::hexagon_F2_conv_w2df; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_ud2sf: + ID = Intrinsic::hexagon_F2_conv_ud2sf; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_ud2df: + ID = Intrinsic::hexagon_F2_conv_ud2df; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_d2sf: + ID = Intrinsic::hexagon_F2_conv_d2sf; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_d2df: + ID = Intrinsic::hexagon_F2_conv_d2df; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2uw: + ID = Intrinsic::hexagon_F2_conv_sf2uw; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2w: + ID = Intrinsic::hexagon_F2_conv_sf2w; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2ud: + ID = Intrinsic::hexagon_F2_conv_sf2ud; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2d: + ID = Intrinsic::hexagon_F2_conv_sf2d; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2uw: + ID = Intrinsic::hexagon_F2_conv_df2uw; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2w: + ID = Intrinsic::hexagon_F2_conv_df2w; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2ud: + ID = Intrinsic::hexagon_F2_conv_df2ud; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2d: + ID = Intrinsic::hexagon_F2_conv_df2d; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2uw_chop: + ID = Intrinsic::hexagon_F2_conv_sf2uw_chop; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2w_chop: + ID = Intrinsic::hexagon_F2_conv_sf2w_chop; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2ud_chop: + ID = Intrinsic::hexagon_F2_conv_sf2ud_chop; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_sf2d_chop: + ID = Intrinsic::hexagon_F2_conv_sf2d_chop; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2uw_chop: + ID = Intrinsic::hexagon_F2_conv_df2uw_chop; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2w_chop: + ID = Intrinsic::hexagon_F2_conv_df2w_chop; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2ud_chop: + ID = Intrinsic::hexagon_F2_conv_df2ud_chop; break; + + case Hexagon::BI__builtin_HEXAGON_F2_conv_df2d_chop: + ID = Intrinsic::hexagon_F2_conv_df2d_chop; break; + case Hexagon::BI__builtin_HEXAGON_S2_asr_r_r: ID = Intrinsic::hexagon_S2_asr_r_r; break; @@ -3912,6 +4555,18 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_lsl_r_p_or: ID = Intrinsic::hexagon_S2_lsl_r_p_or; break; + case Hexagon::BI__builtin_HEXAGON_S2_asr_r_p_xor: + ID = Intrinsic::hexagon_S2_asr_r_p_xor; break; + + case Hexagon::BI__builtin_HEXAGON_S2_asl_r_p_xor: + ID = Intrinsic::hexagon_S2_asl_r_p_xor; break; + + case Hexagon::BI__builtin_HEXAGON_S2_lsr_r_p_xor: + ID = Intrinsic::hexagon_S2_lsr_r_p_xor; break; + + case Hexagon::BI__builtin_HEXAGON_S2_lsl_r_p_xor: + ID = Intrinsic::hexagon_S2_lsl_r_p_xor; break; + case Hexagon::BI__builtin_HEXAGON_S2_asr_r_r_sat: ID = Intrinsic::hexagon_S2_asr_r_r_sat; break; @@ -4029,9 +4684,42 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax: ID = Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax; break; + case Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_rnd: + ID = Intrinsic::hexagon_S2_asr_i_p_rnd; break; + + case Hexagon::BI__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax: + ID = Intrinsic::hexagon_S2_asr_i_p_rnd_goodsyntax; break; + + case Hexagon::BI__builtin_HEXAGON_S4_lsli: + ID = Intrinsic::hexagon_S4_lsli; break; + case Hexagon::BI__builtin_HEXAGON_S2_addasl_rrri: ID = Intrinsic::hexagon_S2_addasl_rrri; break; + case Hexagon::BI__builtin_HEXAGON_S4_andi_asl_ri: + ID = Intrinsic::hexagon_S4_andi_asl_ri; break; + + case Hexagon::BI__builtin_HEXAGON_S4_ori_asl_ri: + ID = Intrinsic::hexagon_S4_ori_asl_ri; break; + + case Hexagon::BI__builtin_HEXAGON_S4_addi_asl_ri: + ID = Intrinsic::hexagon_S4_addi_asl_ri; break; + + case Hexagon::BI__builtin_HEXAGON_S4_subi_asl_ri: + ID = Intrinsic::hexagon_S4_subi_asl_ri; break; + + case Hexagon::BI__builtin_HEXAGON_S4_andi_lsr_ri: + ID = Intrinsic::hexagon_S4_andi_lsr_ri; break; + + case Hexagon::BI__builtin_HEXAGON_S4_ori_lsr_ri: + ID = Intrinsic::hexagon_S4_ori_lsr_ri; break; + + case Hexagon::BI__builtin_HEXAGON_S4_addi_lsr_ri: + ID = Intrinsic::hexagon_S4_addi_lsr_ri; break; + + case Hexagon::BI__builtin_HEXAGON_S4_subi_lsr_ri: + ID = Intrinsic::hexagon_S4_subi_lsr_ri; break; + case Hexagon::BI__builtin_HEXAGON_S2_valignib: ID = Intrinsic::hexagon_S2_valignib; break; @@ -4065,30 +4753,51 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_tableidxd_goodsyntax: ID = Intrinsic::hexagon_S2_tableidxd_goodsyntax; break; + case Hexagon::BI__builtin_HEXAGON_A4_bitspliti: + ID = Intrinsic::hexagon_A4_bitspliti; break; + + case Hexagon::BI__builtin_HEXAGON_A4_bitsplit: + ID = Intrinsic::hexagon_A4_bitsplit; break; + + case Hexagon::BI__builtin_HEXAGON_S4_extract: + ID = Intrinsic::hexagon_S4_extract; break; + case Hexagon::BI__builtin_HEXAGON_S2_extractu: ID = Intrinsic::hexagon_S2_extractu; break; case Hexagon::BI__builtin_HEXAGON_S2_insertp: ID = Intrinsic::hexagon_S2_insertp; break; + case Hexagon::BI__builtin_HEXAGON_S4_extractp: + ID = Intrinsic::hexagon_S4_extractp; break; + case Hexagon::BI__builtin_HEXAGON_S2_extractup: ID = Intrinsic::hexagon_S2_extractup; break; case Hexagon::BI__builtin_HEXAGON_S2_insert_rp: ID = Intrinsic::hexagon_S2_insert_rp; break; + case Hexagon::BI__builtin_HEXAGON_S4_extract_rp: + ID = Intrinsic::hexagon_S4_extract_rp; break; + case Hexagon::BI__builtin_HEXAGON_S2_extractu_rp: ID = Intrinsic::hexagon_S2_extractu_rp; break; case Hexagon::BI__builtin_HEXAGON_S2_insertp_rp: ID = Intrinsic::hexagon_S2_insertp_rp; break; + case Hexagon::BI__builtin_HEXAGON_S4_extractp_rp: + ID = Intrinsic::hexagon_S4_extractp_rp; break; + case Hexagon::BI__builtin_HEXAGON_S2_extractup_rp: ID = Intrinsic::hexagon_S2_extractup_rp; break; case Hexagon::BI__builtin_HEXAGON_S2_tstbit_i: ID = Intrinsic::hexagon_S2_tstbit_i; break; + case Hexagon::BI__builtin_HEXAGON_S4_ntstbit_i: + ID = Intrinsic::hexagon_S4_ntstbit_i; break; + case Hexagon::BI__builtin_HEXAGON_S2_setbit_i: ID = Intrinsic::hexagon_S2_setbit_i; break; @@ -4101,6 +4810,9 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_tstbit_r: ID = Intrinsic::hexagon_S2_tstbit_r; break; + case Hexagon::BI__builtin_HEXAGON_S4_ntstbit_r: + ID = Intrinsic::hexagon_S4_ntstbit_r; break; + case Hexagon::BI__builtin_HEXAGON_S2_setbit_r: ID = Intrinsic::hexagon_S2_setbit_r; break; @@ -4122,6 +4834,15 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_asr_r_vh: ID = Intrinsic::hexagon_S2_asr_r_vh; break; + case Hexagon::BI__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax: + ID = Intrinsic::hexagon_S5_asrhub_rnd_sat_goodsyntax; break; + + case Hexagon::BI__builtin_HEXAGON_S5_asrhub_sat: + ID = Intrinsic::hexagon_S5_asrhub_sat; break; + + case Hexagon::BI__builtin_HEXAGON_S5_vasrhrnd_goodsyntax: + ID = Intrinsic::hexagon_S5_vasrhrnd_goodsyntax; break; + case Hexagon::BI__builtin_HEXAGON_S2_asl_r_vh: ID = Intrinsic::hexagon_S2_asl_r_vh; break; @@ -4236,6 +4957,12 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_shuffeh: ID = Intrinsic::hexagon_S2_shuffeh; break; + case Hexagon::BI__builtin_HEXAGON_S5_popcountp: + ID = Intrinsic::hexagon_S5_popcountp; break; + + case Hexagon::BI__builtin_HEXAGON_S4_parity: + ID = Intrinsic::hexagon_S4_parity; break; + case Hexagon::BI__builtin_HEXAGON_S2_parityp: ID = Intrinsic::hexagon_S2_parityp; break; @@ -4245,6 +4972,15 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_clbnorm: ID = Intrinsic::hexagon_S2_clbnorm; break; + case Hexagon::BI__builtin_HEXAGON_S4_clbaddi: + ID = Intrinsic::hexagon_S4_clbaddi; break; + + case Hexagon::BI__builtin_HEXAGON_S4_clbpnorm: + ID = Intrinsic::hexagon_S4_clbpnorm; break; + + case Hexagon::BI__builtin_HEXAGON_S4_clbpaddi: + ID = Intrinsic::hexagon_S4_clbpaddi; break; + case Hexagon::BI__builtin_HEXAGON_S2_clb: ID = Intrinsic::hexagon_S2_clb; break; @@ -4266,168 +5002,26 @@ Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID, case Hexagon::BI__builtin_HEXAGON_S2_brev: ID = Intrinsic::hexagon_S2_brev; break; + case Hexagon::BI__builtin_HEXAGON_S2_brevp: + ID = Intrinsic::hexagon_S2_brevp; break; + case Hexagon::BI__builtin_HEXAGON_S2_ct0: ID = Intrinsic::hexagon_S2_ct0; break; case Hexagon::BI__builtin_HEXAGON_S2_ct1: ID = Intrinsic::hexagon_S2_ct1; break; + case Hexagon::BI__builtin_HEXAGON_S2_ct0p: + ID = Intrinsic::hexagon_S2_ct0p; break; + + case Hexagon::BI__builtin_HEXAGON_S2_ct1p: + ID = Intrinsic::hexagon_S2_ct1p; break; + case Hexagon::BI__builtin_HEXAGON_S2_interleave: ID = Intrinsic::hexagon_S2_interleave; break; case Hexagon::BI__builtin_HEXAGON_S2_deinterleave: ID = Intrinsic::hexagon_S2_deinterleave; break; - - case Hexagon::BI__builtin_SI_to_SXTHI_asrh: - ID = Intrinsic::hexagon_SI_to_SXTHI_asrh; break; - - case Hexagon::BI__builtin_HEXAGON_A4_orn: - ID = Intrinsic::hexagon_A4_orn; break; - - case Hexagon::BI__builtin_HEXAGON_A4_andn: - ID = Intrinsic::hexagon_A4_andn; break; - - case Hexagon::BI__builtin_HEXAGON_A4_ornp: - ID = Intrinsic::hexagon_A4_ornp; break; - - case Hexagon::BI__builtin_HEXAGON_A4_andnp: - ID = Intrinsic::hexagon_A4_andnp; break; - - case Hexagon::BI__builtin_HEXAGON_A4_combineir: - ID = Intrinsic::hexagon_A4_combineir; break; - - case Hexagon::BI__builtin_HEXAGON_A4_combineri: - ID = Intrinsic::hexagon_A4_combineri; break; - - case Hexagon::BI__builtin_HEXAGON_C4_cmpneqi: - ID = Intrinsic::hexagon_C4_cmpneqi; break; - - case Hexagon::BI__builtin_HEXAGON_C4_cmpneq: - ID = Intrinsic::hexagon_C4_cmpneq; break; - - case Hexagon::BI__builtin_HEXAGON_C4_cmpltei: - ID = Intrinsic::hexagon_C4_cmpltei; break; - - case Hexagon::BI__builtin_HEXAGON_C4_cmplte: - ID = Intrinsic::hexagon_C4_cmplte; break; - - case Hexagon::BI__builtin_HEXAGON_C4_cmplteui: - ID = Intrinsic::hexagon_C4_cmplteui; break; - - case Hexagon::BI__builtin_HEXAGON_C4_cmplteu: - ID = Intrinsic::hexagon_C4_cmplteu; break; - - case Hexagon::BI__builtin_HEXAGON_A4_rcmpneq: - ID = Intrinsic::hexagon_A4_rcmpneq; break; - - case Hexagon::BI__builtin_HEXAGON_A4_rcmpneqi: - ID = Intrinsic::hexagon_A4_rcmpneqi; break; - - case Hexagon::BI__builtin_HEXAGON_A4_rcmpeq: - ID = Intrinsic::hexagon_A4_rcmpeq; break; - - case Hexagon::BI__builtin_HEXAGON_A4_rcmpeqi: - ID = Intrinsic::hexagon_A4_rcmpeqi; break; - - case Hexagon::BI__builtin_HEXAGON_C4_fastcorner9: - ID = Intrinsic::hexagon_C4_fastcorner9; break; - - case Hexagon::BI__builtin_HEXAGON_C4_fastcorner9_not: - ID = Intrinsic::hexagon_C4_fastcorner9_not; break; - - case Hexagon::BI__builtin_HEXAGON_C4_and_andn: - ID = Intrinsic::hexagon_C4_and_andn; break; - - case Hexagon::BI__builtin_HEXAGON_C4_and_and: - ID = Intrinsic::hexagon_C4_and_and; break; - - case Hexagon::BI__builtin_HEXAGON_C4_and_orn: - ID = Intrinsic::hexagon_C4_and_orn; break; - - case Hexagon::BI__builtin_HEXAGON_C4_and_or: - ID = Intrinsic::hexagon_C4_and_or; break; - - case Hexagon::BI__builtin_HEXAGON_C4_or_andn: - ID = Intrinsic::hexagon_C4_or_andn; break; - - case Hexagon::BI__builtin_HEXAGON_C4_or_and: - ID = Intrinsic::hexagon_C4_or_and; break; - - case Hexagon::BI__builtin_HEXAGON_C4_or_orn: - ID = Intrinsic::hexagon_C4_or_orn; break; - - case Hexagon::BI__builtin_HEXAGON_C4_or_or: - ID = Intrinsic::hexagon_C4_or_or; break; - - case Hexagon::BI__builtin_HEXAGON_S4_addaddi: - ID = Intrinsic::hexagon_S4_addaddi; break; - - case Hexagon::BI__builtin_HEXAGON_S4_subaddi: - ID = Intrinsic::hexagon_S4_subaddi; break; - - case Hexagon::BI__builtin_HEXAGON_M4_xor_xacc: - ID = Intrinsic::hexagon_M4_xor_xacc; break; - - case Hexagon::BI__builtin_HEXAGON_M4_and_and: - ID = Intrinsic::hexagon_M4_and_and; break; - - case Hexagon::BI__builtin_HEXAGON_M4_and_or: - ID = Intrinsic::hexagon_M4_and_or; break; - - case Hexagon::BI__builtin_HEXAGON_M4_and_xor: - ID = Intrinsic::hexagon_M4_and_xor; break; - - case Hexagon::BI__builtin_HEXAGON_M4_and_andn: - ID = Intrinsic::hexagon_M4_and_andn; break; - - case Hexagon::BI__builtin_HEXAGON_M4_xor_and: - ID = Intrinsic::hexagon_M4_xor_and; break; - - case Hexagon::BI__builtin_HEXAGON_M4_xor_or: - ID = Intrinsic::hexagon_M4_xor_or; break; - - case Hexagon::BI__builtin_HEXAGON_M4_xor_andn: - ID = Intrinsic::hexagon_M4_xor_andn; break; - - case Hexagon::BI__builtin_HEXAGON_M4_or_and: - ID = Intrinsic::hexagon_M4_or_and; break; - - case Hexagon::BI__builtin_HEXAGON_M4_or_or: - ID = Intrinsic::hexagon_M4_or_or; break; - - case Hexagon::BI__builtin_HEXAGON_M4_or_xor: - ID = Intrinsic::hexagon_M4_or_xor; break; - - case Hexagon::BI__builtin_HEXAGON_M4_or_andn: - ID = Intrinsic::hexagon_M4_or_andn; break; - - case Hexagon::BI__builtin_HEXAGON_S4_or_andix: - ID = Intrinsic::hexagon_S4_or_andix; break; - - case Hexagon::BI__builtin_HEXAGON_S4_or_andi: - ID = Intrinsic::hexagon_S4_or_andi; break; - - case Hexagon::BI__builtin_HEXAGON_S4_or_ori: - ID = Intrinsic::hexagon_S4_or_ori; break; - - case Hexagon::BI__builtin_HEXAGON_A4_modwrapu: - ID = Intrinsic::hexagon_A4_modwrapu; break; - - case Hexagon::BI__builtin_HEXAGON_A4_cround_rr: - ID = Intrinsic::hexagon_A4_cround_rr; break; - - case Hexagon::BI__builtin_HEXAGON_A4_round_ri: - ID = Intrinsic::hexagon_A4_round_ri; break; - - case Hexagon::BI__builtin_HEXAGON_A4_round_rr: - ID = Intrinsic::hexagon_A4_round_rr; break; - - case Hexagon::BI__builtin_HEXAGON_A4_round_ri_sat: - ID = Intrinsic::hexagon_A4_round_ri_sat; break; - - case Hexagon::BI__builtin_HEXAGON_A4_round_rr_sat: - ID = Intrinsic::hexagon_A4_round_rr_sat; break; - } llvm::Function *F = CGM.getIntrinsic(ID); diff --git a/lib/Driver/Tools.cpp b/lib/Driver/Tools.cpp index 47b5294954..3d17c81232 100644 --- a/lib/Driver/Tools.cpp +++ b/lib/Driver/Tools.cpp @@ -1100,6 +1100,12 @@ void Clang::AddHexagonTargetArgs(const ArgList &Args, A->claim(); } + if (!Args.hasArg(options::OPT_fno_short_enums)) + CmdArgs.push_back("-fshort-enums"); + if (Args.getLastArg(options::OPT_mieee_rnd_near)) { + CmdArgs.push_back ("-mllvm"); + CmdArgs.push_back ("-enable-hexagon-ieee-rnd-near"); + } CmdArgs.push_back ("-mllvm"); CmdArgs.push_back ("-machine-sink-split=0"); } |