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| author | Michael Zuckerman <Michael.zuckerman@intel.com> | 2016-05-23 15:04:39 +0000 |
|---|---|---|
| committer | Michael Zuckerman <Michael.zuckerman@intel.com> | 2016-05-23 15:04:39 +0000 |
| commit | df9c980345ef84b7c5669e80c0f264f9739ed0de (patch) | |
| tree | a76e89accb40465dd8457e04b91758dedf4610be /test/CodeGen/avx512vbmivl-builtin.c | |
| parent | fc8ef5004a1c1ebb3e0baba2b671b9e853f70c8a (diff) | |
[clang][AVX512][Builtin] adding missing intrinsics for vpmultishiftqb{128|256|512} instruction set .
Differential Revision: http://reviews.llvm.org/D20521
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@270441 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/avx512vbmivl-builtin.c')
| -rw-r--r-- | test/CodeGen/avx512vbmivl-builtin.c | 43 |
1 files changed, 40 insertions, 3 deletions
diff --git a/test/CodeGen/avx512vbmivl-builtin.c b/test/CodeGen/avx512vbmivl-builtin.c index 29864eccdf..549c9656c0 100644 --- a/test/CodeGen/avx512vbmivl-builtin.c +++ b/test/CodeGen/avx512vbmivl-builtin.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature avx512vbmi -target-feature avx512vl -target-feature avx2 -emit-llvm -o - -Werror | FileCheck %s +// RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +avx512vbmi -target-feature +avx512vl -target-feature +avx512bw -emit-llvm -o - -Werror | FileCheck %s // Don't include mm_malloc.h, it's system specific. #define __MM_MALLOC_H @@ -85,6 +85,43 @@ __m256i test_mm256_mask_permutex2var_epi8(__m256i __A, __mmask32 __U, __m256i __ __m256i test_mm256_maskz_permutex2var_epi8(__mmask32 __U, __m256i __A, __m256i __I, __m256i __B) { // CHECK-LABEL: @test_mm256_maskz_permutex2var_epi8 - // CHECK: @llvm.x86.avx512.mask.vpermt2var.qi.256 + // CHECK: @llvm.x86.avx512.maskz.vpermt2var.qi.256 return _mm256_maskz_permutex2var_epi8(__U, __A, __I, __B); -}
\ No newline at end of file +} + +__m128i test_mm_mask_multishift_epi64_epi8(__m128i __W, __mmask16 __M, __m128i __X, __m128i __Y) { + // CHECK-LABEL: @test_mm_mask_multishift_epi64_epi8 + // CHECK: @llvm.x86.avx512.mask.pmultishift.qb.128 + return _mm_mask_multishift_epi64_epi8(__W, __M, __X, __Y); +} + +__m128i test_mm_maskz_multishift_epi64_epi8(__mmask16 __M, __m128i __X, __m128i __Y) { + // CHECK-LABEL: @test_mm_maskz_multishift_epi64_epi8 + // CHECK: @llvm.x86.avx512.mask.pmultishift.qb.128 + return _mm_maskz_multishift_epi64_epi8(__M, __X, __Y); +} + +__m128i test_mm_multishift_epi64_epi8(__m128i __X, __m128i __Y) { + // CHECK-LABEL: @test_mm_multishift_epi64_epi8 + // CHECK: @llvm.x86.avx512.mask.pmultishift.qb.128 + return _mm_multishift_epi64_epi8(__X, __Y); +} + +__m256i test_mm256_mask_multishift_epi64_epi8(__m256i __W, __mmask32 __M, __m256i __X, __m256i __Y) { + // CHECK-LABEL: @test_mm256_mask_multishift_epi64_epi8 + // CHECK: @llvm.x86.avx512.mask.pmultishift.qb.256 + return _mm256_mask_multishift_epi64_epi8(__W, __M, __X, __Y); +} + +__m256i test_mm256_maskz_multishift_epi64_epi8(__mmask32 __M, __m256i __X, __m256i __Y) { + // CHECK-LABEL: @test_mm256_maskz_multishift_epi64_epi8 + // CHECK: @llvm.x86.avx512.mask.pmultishift.qb.256 + return _mm256_maskz_multishift_epi64_epi8(__M, __X, __Y); +} + +__m256i test_mm256_multishift_epi64_epi8(__m256i __X, __m256i __Y) { + // CHECK-LABEL: @test_mm256_multishift_epi64_epi8 + // CHECK: @llvm.x86.avx512.mask.pmultishift.qb.256 + return _mm256_multishift_epi64_epi8(__X, __Y); +} + |