diff options
| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-11-01 14:46:20 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-11-01 14:46:20 +0000 |
| commit | 1cd2ec853d7d1b67c182989921a27fc875e36ffb (patch) | |
| tree | ba5de636265790b2818048cfae1a4ccf73e62a78 /test/CodeGen/builtins-ppc-p9vector.c | |
| parent | 2f6104867287dececb46e8d93dd9246aad47c282 (diff) | |
[PowerPC] Implement vector shift builtins - clang portion
This patch corresponds to review https://reviews.llvm.org/D26092.
Committing on behalf of Tony Jiang.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285694 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/builtins-ppc-p9vector.c')
| -rw-r--r-- | test/CodeGen/builtins-ppc-p9vector.c | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/test/CodeGen/builtins-ppc-p9vector.c b/test/CodeGen/builtins-ppc-p9vector.c index 5cbdde2341..32c84f1c7f 100644 --- a/test/CodeGen/builtins-ppc-p9vector.c +++ b/test/CodeGen/builtins-ppc-p9vector.c @@ -756,7 +756,6 @@ signed int test62(void) { // CHECK-LE-NEXT: ret i32 return vec_cnttz_lsbb (vuca); } - vector unsigned int test63(void) { // CHECK-BE: @llvm.ppc.altivec.vprtybw(<4 x i32> // CHECK-BE-NEXT: ret <4 x i32> @@ -764,7 +763,6 @@ vector unsigned int test63(void) { // CHECK-NEXT: ret <4 x i32> return vec_parity_lsbb (vuia); } - vector unsigned int test64(void) { // CHECK-BE: @llvm.ppc.altivec.vprtybw(<4 x i32> // CHECK-BE-NEXT: ret <4 x i32> @@ -772,7 +770,6 @@ vector unsigned int test64(void) { // CHECK-NEXT: ret <4 x i32> return vec_parity_lsbb (vsia); } - vector unsigned long long test65(void) { // CHECK-BE: @llvm.ppc.altivec.vprtybd(<2 x i64> // CHECK-BE-NEXT: ret <2 x i64> @@ -780,7 +777,6 @@ vector unsigned long long test65(void) { // CHECK-NEXT: ret <2 x i64> return vec_parity_lsbb (vula); } - vector unsigned long long test66(void) { // CHECK-BE: @llvm.ppc.altivec.vprtybd(<2 x i64> // CHECK-BE-NEXT: ret <2 x i64> @@ -795,7 +791,6 @@ vector unsigned __int128 test67(void) { // CHECK-NEXT: ret <1 x i128> return vec_parity_lsbb (vui128a); } - vector unsigned __int128 test68(void) { // CHECK-BE: @llvm.ppc.altivec.vprtybq(<1 x i128> // CHECK-BE-NEXT: ret <1 x i128> @@ -803,7 +798,6 @@ vector unsigned __int128 test68(void) { // CHECK-NEXT: ret <1 x i128> return vec_parity_lsbb (vsi128a); } - vector unsigned char test69(void) { // CHECK-BE: call <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8> {{.+}}, <16 x i8> {{.+}}) // CHECK: call <16 x i8> @llvm.ppc.altivec.vabsdub(<16 x i8> {{.+}}, <16 x i8> {{.+}}) @@ -819,3 +813,18 @@ vector unsigned int test71(void) { // CHECK: call <4 x i32> @llvm.ppc.altivec.vabsduw(<4 x i32> {{.+}}, <4 x i32> {{.+}}) return vec_absd(vuia, vuib); } +vector unsigned char test72(void) { +// CHECK-BE: @llvm.ppc.altivec.vslv(<16 x i8> +// CHECK-BE-NEXT: ret <16 x i8> +// CHECK: @llvm.ppc.altivec.vslv(<16 x i8> +// CHECK-NEXT: ret <16 x i8> + return vec_slv (vuca, vucb); +} +vector unsigned char test73(void) { +// CHECK-BE: @llvm.ppc.altivec.vsrv(<16 x i8> +// CHECK-BE-NEXT: ret <16 x i8> +// CHECK: @llvm.ppc.altivec.vsrv(<16 x i8> +// CHECK-NEXT: ret <16 x i8> + return vec_srv (vuca, vucb); +} + |