diff options
author | Sean Fertile <sfertile@ca.ibm.com> | 2016-11-14 14:43:27 +0000 |
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committer | Sean Fertile <sfertile@ca.ibm.com> | 2016-11-14 14:43:27 +0000 |
commit | c54eff050c0c8f1cd96266693eea8bd0654633a0 (patch) | |
tree | 0b4932ef4dde2e3cfaf77b2d5430ffc9822f9b9c /test/CodeGen/builtins-ppc-p9vector.c | |
parent | 42f6941e34cce2b3770c5bd0aafd97efc16898bb (diff) |
[PPC] add extract sig/exp test data class for vec float and vec double.
Add vector extract exponent/significand functions to altivec.h, as well as
functions (and related constants) to test the data class of vector float
and vector double.
Differential Revision: https://reviews.llvm.org/D26271
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286830 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/builtins-ppc-p9vector.c')
-rw-r--r-- | test/CodeGen/builtins-ppc-p9vector.c | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/test/CodeGen/builtins-ppc-p9vector.c b/test/CodeGen/builtins-ppc-p9vector.c index 5e942a38f6..c14ad71ea5 100644 --- a/test/CodeGen/builtins-ppc-p9vector.c +++ b/test/CodeGen/builtins-ppc-p9vector.c @@ -925,3 +925,45 @@ vector double test81(void) { // CHECK-LE: insertelement <4 x float> return vec_pack(vda, vdb); } +vector unsigned int test82(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxexpsp(<4 x float> {{.+}}) +// CHECK-BE-NEXT: ret <4 x i32> +// CHECK: @llvm.ppc.vsx.xvxexpsp(<4 x float> {{.+}}) +// CHECK-NEXT: ret <4 x i32> + return vec_extract_exp(vfa); +} +vector unsigned long long test83(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxexpdp(<2 x double> {{.+}}) +// CHECK-BE-NEXT: ret <2 x i64> +// CHECK: @llvm.ppc.vsx.xvxexpdp(<2 x double> {{.+}}) +// CHECK-NEXT: ret <2 x i64> + return vec_extract_exp(vda); +} +vector unsigned int test84(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxsigsp(<4 x float> {{.+}}) +// CHECK-BE-NEXT: ret <4 x i32> +// CHECK: @llvm.ppc.vsx.xvxsigsp(<4 x float> {{.+}}) +// CHECK-NEXT: ret <4 x i32> + return vec_extract_sig(vfa); +} +vector unsigned long long test85(void) { +// CHECK-BE: @llvm.ppc.vsx.xvxsigdp(<2 x double> {{.+}}) +// CHECK-BE-NEXT: ret <2 x i64> +// CHECK: @llvm.ppc.vsx.xvxsigdp(<2 x double> {{.+}}) +// CHECK-NEXT: ret <2 x i64> + return vec_extract_sig(vda); +} +vector bool int test86(void) { +// CHECK-BE: @llvm.ppc.vsx.xvtstdcsp(<4 x float> {{.+}}, i32 127) +// CHECK-BE-NEXT: ret <4 x i32> +// CHECK: @llvm.ppc.vsx.xvtstdcsp(<4 x float> {{.+}}, i32 127) +// CHECK-NEXT: ret <4 x i32> + return vec_test_data_class(vfa, __VEC_CLASS_FP_NOT_NORMAL); +} +vector bool long long test87(void) { +// CHECK-BE: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127) +// CHECK-BE_NEXT: ret <2 x i64 +// CHECK: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127) +// CHECK-NEXT: ret <2 x i64> + return vec_test_data_class(vda, __VEC_CLASS_FP_NOT_NORMAL); +} |