[PowerPC] Fix the wrong implementation of builtin vec_rlnm.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@291702 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 8 insertions, 4 deletions

diff --git a/test/CodeGen/builtins-ppc-p9vector.c b/test/CodeGen/builtins-ppc-p9vector.c
index bd0ad182f1..42316970d8 100644
--- a/test/CodeGen/builtins-ppc-p9vector.c
+++ b/test/CodeGen/builtins-ppc-p9vector.c
@@ -868,20 +868,24 @@ vector unsigned long long test76(void) {
   return vec_rlmi(vula, vula, vula);
 }
 vector unsigned int test77(void) {
+// CHECK-BE: %[[RES1:.+]] = shl <4 x i32
+// CHECK-BE: %[[RES2:.+]] = or <4 x i32> %[[RES1]]
 // CHECK-BE: @llvm.ppc.altivec.vrlwnm(<4 x i32
-// CHECK-BE: and <4 x i32
 // CHECK-BE: ret <4 x i32>
+// CHECK: %[[RES1:.+]] = shl <4 x i32
+// CHECK: %[[RES2:.+]] = or <4 x i32> %[[RES1]]
 // CHECK: @llvm.ppc.altivec.vrlwnm(<4 x i32
-// CHECK: and <4 x i32
 // CHECK: ret <4 x i32>
   return vec_rlnm(vuia, vuia, vuia);
 }
 vector unsigned long long test78(void) {
+// CHECK-BE: %[[RES1:.+]] = shl <2 x i64
+// CHECK-BE: %[[RES2:.+]] = or <2 x i64> %[[RES1]]
 // CHECK-BE: @llvm.ppc.altivec.vrldnm(<2 x i64
-// CHECK-BE: and <2 x i64
 // CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: %[[RES1:.+]] = shl <2 x i64
+// CHECK: %[[RES2:.+]] = or <2 x i64> %[[RES1]]
 // CHECK: @llvm.ppc.altivec.vrldnm(<2 x i64
-// CHECK: and <2 x i64
 // CHECK-NEXT: ret <2 x i64>
   return vec_rlnm(vula, vula, vula);
 }