diff options
-rw-r--r-- | lib/CodeGen/TargetInfo.cpp | 8 | ||||
-rw-r--r-- | test/CodeGen/mips-aggregate-arg.c | 38 |
2 files changed, 0 insertions, 46 deletions
diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp index f705b4eced..eb230aad4d 100644 --- a/lib/CodeGen/TargetInfo.cpp +++ b/lib/CodeGen/TargetInfo.cpp @@ -6751,14 +6751,6 @@ MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory); } - // Use indirect if the aggregate cannot fit into registers for - // passing arguments according to the ABI - unsigned Threshold = IsO32 ? 16 : 64; - - if(getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(Threshold)) - return ABIArgInfo::getIndirect(CharUnits::fromQuantity(Align), true, - getContext().getTypeAlign(Ty) / 8 > Align); - // If we have reached here, aggregates are passed directly by coercing to // another structure type. Padding is inserted if the offset of the // aggregate is unaligned. diff --git a/test/CodeGen/mips-aggregate-arg.c b/test/CodeGen/mips-aggregate-arg.c deleted file mode 100644 index ccf30df7c2..0000000000 --- a/test/CodeGen/mips-aggregate-arg.c +++ /dev/null @@ -1,38 +0,0 @@ -// RUN: %clang_cc1 -triple mipsel-unknown-linux-gnu -S -emit-llvm -o - %s | FileCheck -check-prefix=O32 %s -// RUN: %clang_cc1 -triple mips64el-unknown-linux-gnu -S -emit-llvm -o - %s -target-abi n32 | FileCheck -check-prefix=N32-N64 %s -// RUN: %clang_cc1 -triple mips64el-unknown-linux-gnu -S -emit-llvm -o - %s -target-abi n64 | FileCheck -check-prefix=N32-N64 %s - -struct t1 { - char t1[10]; -}; - -struct t2 { - char t2[20]; -}; - -struct t3 { - char t3[65]; -}; - -extern struct t1 g1; -extern struct t2 g2; -extern struct t3 g3; -extern void f1(struct t1); -extern void f2(struct t2); -extern void f3(struct t3); - -void f() { - -// O32: call void @f1(i32 inreg %{{[0-9]+}}, i32 inreg %{{[0-9]+}}, i16 inreg %{{[0-9]+}}) -// O32: call void @f2(%struct.t2* byval align 4 %{{.*}}) -// O32: call void @f3(%struct.t3* byval align 4 %{{.*}}) - -// N32-N64: call void @f1(i64 inreg %{{[0-9]+}}, i16 inreg %{{[0-9]+}}) -// N32-N64: call void @f2(i64 inreg %{{[0-9]+}}, i64 inreg %{{[0-9]+}}, i32 inreg %{{[0-9]+}}) -// N32-N64: call void @f3(%struct.t3* byval align 8 %{{.*}}) - - f1(g1); - f2(g2); - f3(g3); -} - |