diff options
| -rw-r--r-- | lib/Basic/Targets/X86.h | 8 | ||||
| -rw-r--r-- | test/CodeGenCXX/atomic-inline.cpp | 61 |
2 files changed, 5 insertions, 64 deletions
diff --git a/lib/Basic/Targets/X86.h b/lib/Basic/Targets/X86.h index 019bc8d51a..1d23b0ef69 100644 --- a/lib/Basic/Targets/X86.h +++ b/lib/Basic/Targets/X86.h @@ -350,11 +350,9 @@ public: (1 << TargetInfo::LongDouble)); // x86-32 has atomics up to 8 bytes - CPUKind Kind = getCPUKind(Opts.CPU); - if (Kind >= CK_i586 || Kind == CK_Generic) - MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; - else if (Kind >= CK_i486) - MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32; + // FIXME: Check that we actually have cmpxchg8b before setting + // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.) + MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; } BuiltinVaListKind getBuiltinVaListKind() const override { diff --git a/test/CodeGenCXX/atomic-inline.cpp b/test/CodeGenCXX/atomic-inline.cpp index 327f85d566..fe727589d2 100644 --- a/test/CodeGenCXX/atomic-inline.cpp +++ b/test/CodeGenCXX/atomic-inline.cpp @@ -1,52 +1,6 @@ // RUN: %clang_cc1 %s -std=c++11 -emit-llvm -o - -triple=x86_64-linux-gnu | FileCheck %s // RUN: %clang_cc1 %s -std=c++11 -emit-llvm -o - -triple=x86_64-linux-gnu -target-cpu core2 | FileCheck %s --check-prefix=CORE2 -// RUN: %clang_cc1 %s -std=c++11 -emit-llvm -o - -triple=i386-linux-gnu -target-cpu i386 | FileCheck %s --check-prefix=I386 -// RUN: %clang_cc1 %s -std=c++11 -emit-llvm -o - -triple=i386-linux-gnu -target-cpu i486 | FileCheck %s --check-prefix=I486 -// Check the atomic code generation for cpu targets w/wo cx, cx8 and cx16 support. - -struct alignas(4) AM4 { - short f1, f2; -}; -AM4 m4; -AM4 load4() { - AM4 am; - // CHECK-LABEL: @_Z5load4v - // CHECK: load atomic i32, {{.*}} monotonic - // CORE2-LABEL: @_Z5load4v - // CORE2: load atomic i32, {{.*}} monotonic - // I386-LABEL: @_Z5load4v - // I386: call i32 @__atomic_load_4 - // I486-LABEL: @_Z5load4v - // I486: load atomic i32, {{.*}} monotonic - __atomic_load(&m4, &am, 0); - return am; -} - -AM4 s4; -void store4() { - // CHECK-LABEL: @_Z6store4v - // CHECK: store atomic i32 {{.*}} monotonic - // CORE2-LABEL: @_Z6store4v - // CORE2: store atomic i32 {{.*}} monotonic - // I386-LABEL: @_Z6store4v - // I386: call void @__atomic_store_4 - // I486-LABEL: @_Z6store4v - // I486: store atomic i32 {{.*}} monotonic - __atomic_store(&m4, &s4, 0); -} - -bool cmpxchg4() { - AM4 am; - // CHECK-LABEL: @_Z8cmpxchg4v - // CHECK: cmpxchg i32* {{.*}} monotonic - // CORE2-LABEL: @_Z8cmpxchg4v - // CORE2: cmpxchg i32* {{.*}} monotonic - // I386-LABEL: @_Z8cmpxchg4v - // I386: call zeroext i1 @__atomic_compare_exchange_4 - // I486-LABEL: @_Z8cmpxchg4v - // I486: cmpxchg i32* {{.*}} monotonic - return __atomic_compare_exchange(&m4, &s4, &am, 0, 0, 0); -} +// Check the atomic code generation for cpu targets w/wo cx16 support. struct alignas(8) AM8 { int f1, f2; @@ -58,10 +12,6 @@ AM8 load8() { // CHECK: load atomic i64, {{.*}} monotonic // CORE2-LABEL: @_Z5load8v // CORE2: load atomic i64, {{.*}} monotonic - // I386-LABEL: @_Z5load8v - // I386: call i64 @__atomic_load_8 - // I486-LABEL: @_Z5load8v - // I486: call i64 @__atomic_load_8 __atomic_load(&m8, &am, 0); return am; } @@ -72,10 +22,6 @@ void store8() { // CHECK: store atomic i64 {{.*}} monotonic // CORE2-LABEL: @_Z6store8v // CORE2: store atomic i64 {{.*}} monotonic - // I386-LABEL: @_Z6store8v - // I386: call void @__atomic_store_8 - // I486-LABEL: @_Z6store8v - // I486: call void @__atomic_store_8 __atomic_store(&m8, &s8, 0); } @@ -85,10 +31,6 @@ bool cmpxchg8() { // CHECK: cmpxchg i64* {{.*}} monotonic // CORE2-LABEL: @_Z8cmpxchg8v // CORE2: cmpxchg i64* {{.*}} monotonic - // I386-LABEL: @_Z8cmpxchg8v - // I386: call zeroext i1 @__atomic_compare_exchange_8 - // I486-LABEL: @_Z8cmpxchg8v - // I486: call zeroext i1 @__atomic_compare_exchange_8 return __atomic_compare_exchange(&m8, &s8, &am, 0, 0, 0); } @@ -124,3 +66,4 @@ bool cmpxchg16() { // CORE2: cmpxchg i128* {{.*}} monotonic return __atomic_compare_exchange(&m16, &s16, &am, 0, 0, 0); } + |