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* [COFF, ARM64] Implement InterlockedDecrement*_* builtinsMandeep Singh Grang2018-11-061-0/+10
| | | | | | | | This is eight in a series of patches to move intrinsic definitions out of intrin.h. Differential: https://reviews.llvm.org/D54068 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346208 91177308-0d34-0410-b5e6-96231b3b80d8
* [COFF, ARM64] Implement InterlockedIncrement*_* builtinsMandeep Singh Grang2018-11-061-0/+10
| | | | | | | | This is seventh in a series of patches to move intrinsic definitions out of intrin.h. Differential: https://reviews.llvm.org/D54067 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346207 91177308-0d34-0410-b5e6-96231b3b80d8
* [COFF, ARM64] Implement InterlockedAnd*_* builtinsMandeep Singh Grang2018-11-061-0/+13
| | | | | | | | This is sixth in a series of patches to move intrinsic definitions out of intrin.h. Differential: https://reviews.llvm.org/D54066 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346206 91177308-0d34-0410-b5e6-96231b3b80d8
* [COFF, ARM64] Implement InterlockedXor*_* builtinsMandeep Singh Grang2018-11-061-0/+13
| | | | | | | | | This is fifth in a series of patches to move intrinsic definitions out of intrin.h. Note: This was reviewed and approved in D54065 but somehow that diff was messed up. Committing this again with the proper diff. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346205 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "[COFF, ARM64] Implement InterlockedXor*_* builtins"Mandeep Singh Grang2018-11-061-0/+287
| | | | | | This reverts commit cc3d3cd0fbeb88412d332354c261ff139c4ede6b. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346192 91177308-0d34-0410-b5e6-96231b3b80d8
* [COFF, ARM64] Implement InterlockedXor*_* builtinsMandeep Singh Grang2018-11-061-287/+0
| | | | | | | | | | | | | | Summary: This is fifth in a series of patches to move intrinsic definitions out of intrin.h. Reviewers: rnk, efriedma, mstorsjo, TomTan Reviewed By: efriedma Subscribers: javed.absar, kristof.beyls, chrib, jfb, kristina, cfe-commits Differential Revision: https://reviews.llvm.org/D54065 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346191 91177308-0d34-0410-b5e6-96231b3b80d8
* [COFF, ARM64] Implement InterlockedOr*_* builtinsMandeep Singh Grang2018-11-061-0/+13
| | | | | | This is fourth in a series of patches to move intrinsic definitions out of intrin.h. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346190 91177308-0d34-0410-b5e6-96231b3b80d8
* [COFF, ARM64] Implement InterlockedCompareExchange*_* builtinsMandeep Singh Grang2018-11-061-0/+13
| | | | | | | | | | | | | | Summary: This is third in a series of patches to move intrinsic definitions out of intrin.h. Reviewers: rnk, efriedma, mstorsjo, TomTan Reviewed By: efriedma Subscribers: javed.absar, kristof.beyls, chrib, jfb, kristina, cfe-commits Differential Revision: https://reviews.llvm.org/D54062 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346189 91177308-0d34-0410-b5e6-96231b3b80d8
* [COFF, ARM64] Implement InterlockedExchange*_* builtinsMandeep Singh Grang2018-11-021-0/+13
| | | | | | | | | | | | | | Summary: Windows SDK needs these intrinsics to be proper builtins. This is second in a series of patches to move intrinsic defintions out of intrin.h. Reviewers: rnk, mstorsjo, efriedma, TomTan Reviewed By: rnk, efriedma Subscribers: javed.absar, kristof.beyls, chrib, jfb, kristina, cfe-commits Differential Revision: https://reviews.llvm.org/D54046 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@346044 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] [Windows] Implement _InterlockedExchangeAdd*_* builtins.Eli Friedman2018-10-311-0/+13
| | | | | | | | | | | These apparently need to be proper builtins to handle the Windows SDK. Differential Revision: https://reviews.llvm.org/D53916 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@345779 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] ACLE parallel arithmetic and DSP style multiplicationsSjoerd Meijer2017-12-071-0/+1
| | | | | | | | | | | | This is a follow up of r302131, in which we forgot to add SemaChecking tests. Adding these tests revealed two problems which have been fixed: - added missing intrinsic __qdbl, - properly range checking ssat16 and usat16. Differential Revision: https://reviews.llvm.org/D40888 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@320019 91177308-0d34-0410-b5e6-96231b3b80d8
* Support MS builtins using 'long' on LP64 platformsBruno Cardoso Lopes2017-06-211-4/+4
| | | | | | | | | | | | | | | This allows for -fms-extensions to work the same on LP64. For example, _BitScanReverse is expected to be 32-bit, matching Windows/LLP64, even though long is 64-bit on x86_64 Darwin or Linux (LP64). Implement this by adding a new character code 'N', which is 'int' if the target is LP64 and the same 'L' otherwise Differential Revision: https://reviews.llvm.org/D34377 rdar://problem/32599746 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@305875 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] ACLE Chapter 9 intrinsicsSam Parker2017-05-041-1/+83
| | | | | | | | | | | Implemented the remaining integer data processing intrinsics from the ARM ACLE v2.1 spec, such as parallel arithemtic and DSP style multiplications. Differential Revision: https://reviews.llvm.org/D32282 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302131 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 64-bit MS _Interlocked functions as builtins againAlbert Gutowski2016-10-131-0/+9
| | | | | | | | | | | | Summary: Previously global 64-bit versions of _Interlocked functions broke buildbots on i386, so now I'm adding them as builtins for x86-64 and ARM only (should they be also on AArch64? I had problems with testing it for AArch64, so I left it) Reviewers: hans, majnemer, mstorsjo, rnk Subscribers: cfe-commits, aemerson Differential Revision: https://reviews.llvm.org/D25576 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284172 91177308-0d34-0410-b5e6-96231b3b80d8
* fix _BitScan intrinsics missing header warnings; fix some line endingsAlbert Gutowski2016-10-131-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284167 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MS _BitScan intrinsicsAlbert Gutowski2016-10-121-0/+10
| | | | | | | | | | | | Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin. Reviewers: hans, thakis, rnk, majnemer Subscribers: RKSimon, cfe-commits, aemerson Differential Revision: https://reviews.llvm.org/D25264 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284060 91177308-0d34-0410-b5e6-96231b3b80d8
* [MS] Implement __iso_volatile loads/stores as builtinsMartin Storsjo2016-09-301-0/+8
| | | | | | | | | | | | | | | | | | | | These are supposed to produce the same as normal volatile pointer loads/stores. When -volatile:ms is specified, normal volatile pointers are forced to have atomic semantics (as is the default on x86 in MSVC mode). In that case, these builtins should still produce non-atomic volatile loads/stores without acquire/release semantics, which the new test verifies. These are only available on ARM (and on AArch64, although clang doesn't support AArch64/Windows yet). This implements what is missing for PR30394, making it possible to compile C++ for ARM in MSVC mode with MSVC headers. Differential Revision: https://reviews.llvm.org/D24986 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@282900 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.Ranjeet Singh2016-06-171-4/+6
| | | | | | | | | | | | Reapplying patch in r272777 which was reverted because the llvm patch which added support for generating the mcrr/mcrr2 instructions from the intrinsic was causing an assertion failure. This has now been fixed in llvm. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@272983 91177308-0d34-0410-b5e6-96231b3b80d8
* [Builtin] Make __builtin_thread_pointer target-independent.Marcin Koscielnicki2016-06-161-1/+0
| | | | | | | | This is now supported for ARM, AArch64, PowerPC, SystemZ, SPARC, Mips. Differential Revision: http://reviews.llvm.org/D19589 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@272893 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting r272777 because one of the testsRanjeet Singh2016-06-151-6/+4
| | | | | | | | added in the llvm patch is causing an assertion to fail. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@272790 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.Ranjeet Singh2016-06-151-4/+6
| | | | | | | | | | | | | | | | Patch adds intrinsics for mrrc/mrrc2. The intrinsics for mrrc/mrrc2 return a single uint64_t to represent two 32 bit values. The mcrr/mcrr2 intrinsic was changed to accept a single uint64_t instead of two 32 bit values as the input for consistency. Differential Revision: http://reviews.llvm.org/D21179 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@272777 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Add load/store co-processor intrinsics.Ranjeet Singh2016-05-311-0/+10
| | | | | | | | Differential Revision: http://reviews.llvm.org/D20563 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@271275 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Fix cdp intrinsicRanjeet Singh2016-05-191-2/+2
| | | | | | | | | | | | | - Fixed cdp intrinsic to only accept compile time constant values previously you could pass in a variable to the builtin which would result in illegal llvm assembly output Differential Revision: http://reviews.llvm.org/D20394 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@270058 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Mark mcr/mrc builtin operands as required-immediate.Ahmed Bougacha2015-08-261-6/+6
| | | | | | | An early error message is better than the "cannot select" alternative. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@246094 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve error handling for PR22560.Bob Wilson2015-06-231-4/+4
| | | | | | | | | The ARM _MoveToCoprocessor and _MoveFromCoprocessor builtins require integer constants for most arguments, but clang was not checking that. With this change, we now report meaningful errors instead of crashing in the backend. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@240463 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch implements clang support for the ACLE special register intrinsicsLuke Cheeseman2015-06-151-0/+8
| | | | | | | | | | | | | | | in section 10.1, __arm_{w,r}sr{,p,64}. This includes arm_acle.h definitions with builtins and codegen to support these, the intrinsics are implemented by generating read/write_register calls which get appropriately lowered in the backend based on the register string provided. SemaChecking is also implemented to fault invalid parameters. Differential Revision: http://reviews.llvm.org/D9697 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@239737 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix __ldrexd arm intrinsic.James Molloy2015-02-101-1/+1
| | | | | | | | | | | The parameter definition of this API is const volatile __int64*, but it is not defined correctly in clang. Move the 'CD' to the correct location. Bug tracked here: http://llvm.org/bugs/show_bug.cgi?id=21004 Patch by Daniel Jump! git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@228678 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: implement __emit intrinsicSaleem Abdulrasool2014-12-171-0/+2
| | | | | | | | | | | | | | | For MSVC compatibility, add the `__emit' builtin. This is used in the Windows SDK headers, and must therefore be implemented as a builtin rather than an intrinsic. The `__emit' builtin provides a mechanism to emit a 16-bit opcode instruction into the stream. The value must be a compile time constant expression. No guarantees are made about the CPU and memory states after the execution of the instruction. Due to the unchecked nature of the builtin, only support this on Windows on ARM. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@224438 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Add dbg builtin intrinsicYi Kong2014-08-261-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@216452 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Prefetch intrinsicsYi Kong2014-08-131-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@215568 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Implement __builtin_arm_nop intrinsicYi Kong2014-07-141-0/+1
| | | | | | | | | | | | This patch implements __builtin_arm_nop intrinsic for AArch32 and AArch64, which generates hint 0x0, the alias of NOP instruction. This intrinsic is necessary to implement ACLE __nop intrinsic. Differential Revision: http://reviews.llvm.org/D4495 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212947 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: add support for a few MSVC ARM intrinsicsSaleem Abdulrasool2014-07-051-0/+9
| | | | | | | | This adds support for simple MSVC compatibility mode intrinsics. These intrinsics are simple in that they are either directly passed through to the annotated MSBuiltin intrinsic or they mirror existing GCC builtins. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212378 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Implement ISB memory barrier intrinsicYi Kong2014-07-031-0/+1
| | | | | | | | Adds support for __builtin_arm_isb. Also corrects DSB and ISB instructions modelling by adding has-side-effects property. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212277 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: rename ARM builtins to use __builtin_arm prefixSaleem Abdulrasool2014-07-031-5/+5
| | | | | | | | | This corrects SVN r212196's naming change to use the proper prefix of `__builtin_arm_` instead of `__builtin_`. Thanks to Yi Kong for pointing out the incorrect naming! git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212253 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: make target builtins support languagesSaleem Abdulrasool2014-07-021-5/+17
| | | | | | | | | | This extends the target builtin support to allow language specific annotations (i.e. LANGBUILTIN). This is to allow MSVC compatibility whilst retaining the ability to have EABI targets use a __builtin_ prefix. This is merely to allow uniformity in the EABI case where the unprefixed name is provided as an alias in the header. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212196 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: add support for v8 ldaex/stlex builtins.Tim Northover2014-07-021-0/+2
| | | | | | | | | | | | | | ARMv8 adds (to both AArch32 and AArch64) acquiring and releasing variants of the exclusive operations, in line with the C++11 memory model. This adds support for two new intrinsics to expose them to C & C++ developers directly: __builtin_arm_ldaex and __builtin_arm_stlex, in direct analogy with the versions with no implicit barrier. rdar://problem/15885451 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212175 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Support for __builtin_arm_rbit() intrinsic.Jim Grosbach2014-06-161-0/+3
| | | | | | | | Reverse the bits in a word. Maps to the RBIT instruction. rdar://9283021 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@211059 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: complete ARM ACLE hint 8.4 supportSaleem Abdulrasool2014-05-041-0/+3
| | | | | | | Add support for the remaining hints from the ACLE. Although __dbg is listed as a hint, it is handled different, so it is not covered by this change. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@207930 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: reorder ARM hintSaleem Abdulrasool2014-05-021-3/+1
| | | | | | | __yield is part of the ACLE specified extensions and not specific to MSVC. Move the declaration for the hint to the proper group. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@207830 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: rename __builtin_arm_sevl to __sevlSaleem Abdulrasool2014-05-021-1/+1
| | | | | | | ACLE adds the __sevl() extension. Rename the hint from a custom name to the ACLE specified name. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@207829 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: add __yield intrinsic for ARMSaleem Abdulrasool2014-04-251-0/+3
| | | | | | | | | The __yield intrinsic generates a hint instruction to indicate that the thread is not performing any useful operations at the moment. This is for compatibility with MSVC, although, the intrinsic is also part of the ACLE, and is enabled globally as a result. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@207275 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM & AArch64: share the BI__builtin_neon enum defs.Tim Northover2014-01-301-5/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@200470 91177308-0d34-0410-b5e6-96231b3b80d8
* add intrinsics: __builtin_arm_{dmb,dsb} for ARMWeiming Zhao2013-11-121-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@194513 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] Add a builtin to allow you to use the 'sevl' instruction.Joey Gouly2013-10-021-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@191816 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARMv8] Add builtins for CRC instructions.Joey Gouly2013-09-181-0/+10
| | | | | | | Patch by Bradley Smith! git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@190931 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: implement low-level intrinsics for the atomic exclusive operations.Tim Northover2013-07-161-1/+5
| | | | | | | | | | | | This adds three overloaded intrinsics to Clang: T __builtin_arm_ldrex(const volatile T *addr) int __builtin_arm_strex(T val, volatile T *addr) void __builtin_arm_clrex() The intent is that these do what users would expect when given most sensible types. Currently, "sensible" translates to ints, floats and pointers. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@186394 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow clang to build __clear_cache on ARM.Rafael Espindola2013-06-131-1/+1
| | | | | | | | | __clear_cache is special. It needs no signature, but is a real function in compiler_rt or libgcc. Patch by Andrew Turner. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@183926 91177308-0d34-0410-b5e6-96231b3b80d8
* Really fix the declaration of __clear_cache.Rafael Espindola2013-05-141-1/+1
| | | | | | | | | | | | | When I tested gcc's behaviour before, I forgot the extern "C", so it would warn when the types *did* match. So in the end * __clear_cache takes two void pointers. * aarch64 was correct before. * libgcc's manual is wrong. * this patch fixes arm. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@181810 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix __clear_cache on ARM.Rafael Espindola2013-05-141-1/+1
| | | | | | | | | | Current gcc's produce an error if __clear_cache is anything but __clear_cache(char *a, char *b); It looks like we had just implemented a gcc bug that is now fixed. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@181784 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for ARM ldrexd/strexd builtinsBruno Cardoso Lopes2011-05-281-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@132249 91177308-0d34-0410-b5e6-96231b3b80d8
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