summaryrefslogtreecommitdiffstats
path: root/include/clang/Basic/BuiltinsX86.def
Commit message (Collapse)AuthorAgeFilesLines
* [X86] Replace the mask cmpeq/cmple/cmplt/cmpgt/cmpge/cmpneq intrinsics with ↵Craig Topper2017-11-061-30/+1
| | | | | | | | macros that just pass the right comparison predicate value to the regular cmp intrinsic. Remove mask cmpeq/cmpgt builtins that are now unused. This shortens the intrinsic headers a little and allows us to get rid of the cmpeq and cmpgt handling from CGBuiltin.cpp. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317506 91177308-0d34-0410-b5e6-96231b3b80d8
* lowering broadcastmJina Nahias2017-11-061-6/+0
| | | | | | Change-Id: I0661abea3e3742860e0a03ff9e4fcdc367eff7db git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317456 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Add CLWB intrinsic. clang partCraig Topper2017-10-121-0/+3
| | | | | | | | | | | | Reviewers: RKSimon, zvi, igorb Reviewed By: RKSimon Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D38781 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315607 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Correct type for argument to clflushopt intrinsic.Craig Topper2017-10-111-1/+1
| | | | | | | | | | | | | | Summary: According to Intel docs this should take void const *. We had char*. The lack of const is the main issue. Reviewers: RKSimon, zvi, igorb Reviewed By: igorb Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D38782 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315470 91177308-0d34-0410-b5e6-96231b3b80d8
* Lowering Mask Set1 intrinsics to LLVM IRJina Nahias2017-09-191-9/+0
| | | | | | | | This patch, together with a matching llvm patch (https://reviews.llvm.org/D37669), implements the lowering of X86 mask set1 intrinsics to IR. Differential Revision: https://reviews.llvm.org/D37668 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313624 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Disable _mm512_maskz_set1_epi64 intrinsic on 32-bit targets to prevent ↵Craig Topper2017-09-151-1/+0
| | | | | | | | | | | | a backend isel failure. The __builtin_ia32_pbroadcastq512_mem_mask we were previously trying to use in 32-bit mode is not implemented in the x86 backend and causes isel to fail in release builds. In debug builds it fails even earlier during legalization with an llvm_unreachable. While there add the missing test case for this intrinsic for this for 64-bit mode. This fixes PR34631. D37668 should be able to recover this for 32-bit mode soon. But I wanted to fix the crash ahead of that. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313392 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Lower _mm[256|512]_[mask[z]]_avg_epu[8|16] intrinsics to native llvm IRYael Tsafrir2017-09-121-6/+0
| | | | | | Differential Revision: https://reviews.llvm.org/D37562 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@313011 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Implement broadcastf32x2 and broadcasti32x2 intrinsics using ↵Craig Topper2017-08-301-5/+0
| | | | | | | | | | __builtin_shufflevector instead builtins This patch implements the broadcastf32x2/broadcasti32x2 intrinsics using __builtin_shufflevector. Differential Revision: https://reviews.llvm.org/D37287 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@312135 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Add support for __builtin_cpu_initCraig Topper2017-08-281-0/+1
| | | | | | | | | | This adds builtin_cpu_init which will emit a call to cpu_indicator_init in libgcc or compiler-rt. This is needed to support builtin_cpu_supports/builtin_cpu_is in an ifunc resolver. Differential Revision: https://reviews.llvm.org/D36336 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@311874 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Implement __builtin_cpu_isCraig Topper2017-08-101-0/+1
| | | | | | | | This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc. Differential Revision: https://reviews.llvm.org/D35449 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@310657 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Enable isel to use the PAUSE instruction even when SSE2 is disabled. ↵Craig Topper2017-08-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Clang part Summary: On older processors this instruction encoding is treated as a NOP. MSVC doesn't disable intrinsics based on features the way clang/gcc does. Because the PAUSE instruction encoding doesn't crash older processors, some software out there uses these intrinsics without checking for SSE2. This change also seems to also be consistent with gcc behavior. Fixes PR34079 Reviewers: RKSimon, zvi Reviewed By: RKSimon Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D36362 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@310191 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for __builtin_ms_va_list on aarch64Martin Storsjo2017-07-171-5/+0
| | | | | | | | | | | Move builtins from the x86 specific scope into the global scope. Their use is still limited to x86_64 and aarch64 though. This allows wine on aarch64 to properly handle variadic functions. Differential Revision: https://reviews.llvm.org/D34475 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@308218 91177308-0d34-0410-b5e6-96231b3b80d8
* Support MS builtins using 'long' on LP64 platformsBruno Cardoso Lopes2017-06-211-10/+10
| | | | | | | | | | | | | | | This allows for -fms-extensions to work the same on LP64. For example, _BitScanReverse is expected to be 32-bit, matching Windows/LLP64, even though long is 64-bit on x86_64 Darwin or Linux (LP64). Implement this by adding a new character code 'N', which is 'int' if the target is LP64 and the same 'L' otherwise Differential Revision: https://reviews.llvm.org/D34377 rdar://problem/32599746 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@305875 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Adding avx512_vpopcntdq feature set and its intrinsicsOren Ben Simhon2017-05-251-0/+3
| | | | | | | | | | | | AVX512_VPOPCNTDQ is a new feature set that was published by Intel. The patch represents the Clang side of the addition of six intrinsics for two new machine instructions (vpopcntd and vpopcntq). It also includes the addition of the new feature set. Differential Revision: https://reviews.llvm.org/D33170 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@303857 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86][LWP] Add clang support for LWP instructions.Simon Pilgrim2017-05-081-0/+6
| | | | | | | | This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4). Differential Revision: https://reviews.llvm.org/D32770 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302418 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86][SSE] Update MOVNTDQA non-temporal loads to generic implementation (clang)Simon Pilgrim2017-04-141-3/+0
| | | | | | | | | | MOVNTDQA non-temporal aligned vector loads can be correctly represented using generic builtin loads, allowing us to remove the existing x86 intrinsics. LLVM companion patch: D31767. Differential Revision: https://reviews.llvm.org/D31766 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@300326 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Implement __readgsqword (and the rest) as builtins (PR32373)Hans Wennborg2017-03-221-0/+10
| | | | | | | | | | | | | | It seems MS headers have started using __readgsqword, and since it's used in a header that doesn't include intrin.h, we can't implement it as an inline function anymore. That was already the case for __readfsdword, which Saleem added support for in r220859. This patch reuses that codegen to implement all of __read[fg]s{byte,word,dword,qword}. Differential Revision: https://reviews.llvm.org/D31248 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@298538 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Fix avx512vl gather builtins to require the scale argument to be ↵Craig Topper2017-03-121-16/+16
| | | | | | an ICE like the rest of the gather builtins. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@297584 91177308-0d34-0410-b5e6-96231b3b80d8
* [MS] Add support for __ud2 and __int2c MSVC intrinsicsReid Kleckner2017-03-061-0/+2
| | | | | | This was requested in PR31958 and elsewhere. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@297057 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Replace XOP vpcmov builtins with native vector logical operations.Craig Topper2017-02-181-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@295570 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace 512-bit masked packss/packus builtins and replace with new ↵Craig Topper2017-02-161-4/+4
| | | | | | | | unmasked builtins. These new unmasked builtins will enable us to easily support optimizing these builtins in InstCombine in the backend. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@295291 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Clzero flag addition and inclusion under znver1Craig Topper2017-02-091-0/+3
| | | | | | | | | | | | | 1. Adds the command line flag for clzero. 2. Includes the clzero flag under znver1. 3. Defines the macro for clzero. 4. Adds a new file which has the intrinsic definition for clzero instruction. Patch by Ganesh Gopalasubramanian with some additional tests from me. Differential revision: https://reviews.llvm.org/D29386 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@294559 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace subvector broadcast builtins with shufflevectors and selects.Craig Topper2017-01-181-12/+0
| | | | | | Verified that the backend codegens this equally well. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@292329 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace masked 512-bit pmuldq and pmuludq builtins with the newly ↵Craig Topper2016-12-271-2/+2
| | | | | | added unmasked versions and selects. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@290580 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r290574 "foo"Craig Topper2016-12-271-2/+2
| | | | | | This was supposed to be merged with another commit with a real commit message. Sorry. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@290579 91177308-0d34-0410-b5e6-96231b3b80d8
* fooCraig Topper2016-12-271-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@290574 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has ↵Craig Topper2016-12-111-2/+2
| | | | | | | | versions without masking so wrap it with select. This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@289351 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masking from 512-bit pshufb builtin. The backend now has a ↵Craig Topper2016-12-101-1/+1
| | | | | | | | version without masking so wrap it with select. This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@289345 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove 128/256-bit masked vpermilvar builtins and replace with ↵Craig Topper2016-12-101-4/+0
| | | | | | select and the avx unmasked builtins. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@289338 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Replace valignd/q builtins with appropriate __builtin_shufflevector.Craig Topper2016-11-231-6/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@287733 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace masked 16-bit element variable shift builtins with new ↵Craig Topper2016-11-181-9/+9
| | | | | | unmasked versions and selects. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@287313 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86][AVX512] Replace lossless i32/u32 to f64 conversion intrinsics with ↵Simon Pilgrim2016-11-161-6/+0
| | | | | | | | | | | | | | generic IR Both the (V)CVTDQ2PD (i32 to f64) and (V)CVTUDQ2PD (u32 to f64) conversion instructions are lossless and can be safely represented as generic __builtin_convertvector calls instead of x86 intrinsics without affecting final codegen. This patch removes the clang builtins and their use in the headers - a future patch will deal with removing the llvm intrinsics. This is an extension patch to D20528 which dealt with the equivalent sse/avx cases. Differential Revision: https://reviews.llvm.org/D26686 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@287088 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace masked dword and qword variable shift builtins with ↵Craig Topper2016-11-131-8/+8
| | | | | | | | unmasked builtins and a select. This is part of a set of changes to allow InstCombine in the backend to optimize variable shifts without having to know about masking. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286757 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Use scalar vfmsub/vfnmsub mask3 intrinsics instead of inverting ↵Craig Topper2016-11-121-0/+4
| | | | | | | | | | | | | | the mask argument of a vfmadd intrinsic. Summary: Inverting the mask argument does not reflect the intended semantics of the intrinsic. Reviewers: igorb, delena Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D26019 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286733 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Convert the rest of the masked shift by immediate and by single ↵Craig Topper2016-11-121-22/+22
| | | | | | | | element builtins over to the newly added unmasked builtins and a select. This should also fix PR30691 since the new builtins are handled like the legacy builtins in the backend. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286714 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and ↵Ayman Musa2016-11-081-2/+4
| | | | | | | | | | int2mask/mask2int intrinsics. Differential Revision: https://reviews.llvm.org/D26021 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@286229 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masked vector insert builtins and replace with native ↵Craig Topper2016-11-011-12/+0
| | | | | | | | shufflevectors and selects. Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285667 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masked vector extract builtins and replace with native ↵Craig Topper2016-10-311-12/+0
| | | | | | | | shufflevectors and selects. Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285540 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove many of the masked 128/256-bit shift builtins and replace ↵Craig Topper2016-10-311-42/+0
| | | | | | them with unmasked builtins and selects. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285539 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masked 128/256-bit builtins for vpmaddwd and vpmaddubsw. ↵Craig Topper2016-10-301-4/+0
| | | | | | Replace with unmasked builtins and select. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285516 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove 128/256-bit masked pmulhrsw/pmulhuw/pmulhw builtins and use ↵Craig Topper2016-10-291-6/+0
| | | | | | unmasked builtins and select instead. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285505 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masked 128/256-bit sqrt builtins and replace them with ↵Craig Topper2016-10-291-4/+0
| | | | | | unmasked builtins and a select. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285504 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masked 128/256-bit pmuludq/pmuldq builtins and replace them ↵Craig Topper2016-10-291-5/+0
| | | | | | with unmasked builtins and a select. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285503 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masked 128/256-bit floating point max/min builtins. Use ↵Craig Topper2016-10-291-8/+0
| | | | | | unmasked builtins with select instead. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@285502 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace masked 128/256-bit byte, word, and dword min/max builtins ↵Craig Topper2016-10-231-25/+0
| | | | | | with selects and the older unmasked builtins. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284954 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace 512-bit pmovzx/sx builtins with native IR.Craig Topper2016-10-231-12/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284936 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Remove masked 128/256-bit packss/packus builtins and replace with ↵Craig Topper2016-10-231-8/+0
| | | | | | selects and the older unmasked builtins. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284935 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace masked 128/256-bit pavg builtins and replace with select ↵Craig Topper2016-10-221-4/+0
| | | | | | and older unmasked builtins. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284929 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace masked 128/256-bit saturating add/sub builtins with select ↵Craig Topper2016-10-221-16/+0
| | | | | | and older unmasked builtins. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284928 91177308-0d34-0410-b5e6-96231b3b80d8
* [AVX-512] Replace masked 128/256-bit vpmovzx/vpmovsx builtins with native IR.Craig Topper2016-10-221-24/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@284927 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-23 09:05:13 +0000