| Commit message (Collapse) | Author | Age | Files | Lines |
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According to alignment section in below ARM64 ABI document, MSVC could increase
alignment of global data based on its total size. Clang doesn't do this. Compile
the same symbol into different alignments by Clang and MSVC could cause link
error because some instruction encodings, like 64-bit LDR/STR with immediate,
require the target to be 8 bytes aligned, and linker could choose code stream
with such LDR/STR instruction from MSVC and 4 bytes aligned data from Clang into
final image, which actually cannot be linked together
(see https://bugs.llvm.org/show_bug.cgi?id=41506 for more details).
https://docs.microsoft.com/en-us/cpp/build/arm64-windows-abi-conventions?view=vs-2019#alignment
Differential Revision: https://reviews.llvm.org/D61225
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@359744 91177308-0d34-0410-b5e6-96231b3b80d8
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These builtins provide access to the new integer and
sub-integer variants of MMA (matrix multiply-accumulate) instructions
provided by CUDA-10.x on sm_75 (AKA Turing) GPUs.
Also added a feature for PTX 6.4. While Clang/LLVM does not generate
any PTX instructions that need it, we still need to pass it through to
ptxas in order to be able to compile code that uses the new 'mma'
instruction as inline assembly (e.g used by NVIDIA's CUTLASS library
https://github.com/NVIDIA/cutlass/blob/master/cutlass/arch/mma.h#L101)
Differential Revision: https://reviews.llvm.org/D60279
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@359248 91177308-0d34-0410-b5e6-96231b3b80d8
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to reflect the new license.
We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.
Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
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Subscribers: jholewinski, cfe-commits
Differential Revision: https://reviews.llvm.org/D53558
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@345198 91177308-0d34-0410-b5e6-96231b3b80d8
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Differential Revision: https://reviews.llvm.org/D53472
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@344996 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@342924 91177308-0d34-0410-b5e6-96231b3b80d8
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The option enables use of 32-bit pointers for accessing
const/local/shared memory. The feature is disabled by default.
Differential Revision: https://reviews.llvm.org/D46148
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@331938 91177308-0d34-0410-b5e6-96231b3b80d8
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Differential Revision: https://reviews.llvm.org/D45061
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329830 91177308-0d34-0410-b5e6-96231b3b80d8
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When NVPTX TARGET_BUILTIN specifies sm_XX or ptxYY as required feature,
consider those features available if we're compiling for GPU >= sm_XX or have
enabled PTX version >= ptxYY.
Differential Revision: https://reviews.llvm.org/D45061
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329829 91177308-0d34-0410-b5e6-96231b3b80d8
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amdgcn targets only support HIP, which does not define __CUDA_ARCH__.
this is a partial unroll of r329232 / D45277.
Differential Revision: https://reviews.llvm.org/D45387
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329584 91177308-0d34-0410-b5e6-96231b3b80d8
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Patch by Greg Rodgers.
Revised and lit tests added by Yaxun Liu.
Differential Revision: https://reviews.llvm.org/D45277
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@329232 91177308-0d34-0410-b5e6-96231b3b80d8
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A followup to: https://reviews.llvm.org/D42978
This patch adds NVPTX support for
enabling the march notes.
Differential Revision: https://reviews.llvm.org/D43045
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@324675 91177308-0d34-0410-b5e6-96231b3b80d8
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Clang can use CUDA-9.1 now, though new APIs (are not implemented yet.
The major change is that headers in CUDA-9.1 went through substantial
changes that started in CUDA-9.0 which required substantial changes
in the cuda compatibility headers provided by clang.
There are two major issues:
* CUDA SDK no longer provides declarations for libdevice functions.
* A lot of device-side functions have become nvcc's builtins and
CUDA headers no longer contain their implementations.
This patch changes the way CUDA headers are handled if we compile
with CUDA 9.x. Both 9.0 and 9.1 are affected.
* Clang provides its own declarations of libdevice functions.
* For CUDA-9.x clang now provides implementation of device-side
'standard library' functions using libdevice.
This patch should not affect compilation with CUDA-8. There may be
some observable differences for CUDA-9.0, though they are not expected
to affect functionality.
Tested: CUDA test-suite tests for all supported combinations of:
CUDA: 7.0,7.5,8.0,9.0,9.1
GPU: sm_20, sm_35, sm_60, sm_70
Differential Revision: https://reviews.llvm.org/D42513
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@323713 91177308-0d34-0410-b5e6-96231b3b80d8
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Some target devices (e.g. Nvidia GPUs) don't support dynamic stack
allocation and hence no VLAs. Print errors with description instead
of failing in the backend or generating code that doesn't work.
This patch handles explicit uses of VLAs (local variable in target
or declare target region) or implicitly generated (private) VLAs
for reductions on VLAs or on array sections with non-constant size.
Differential Revision: https://reviews.llvm.org/D39505
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318601 91177308-0d34-0410-b5e6-96231b3b80d8
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For now CUDA-9 is not included in the list of CUDA versions clang
searches for, so the path to CUDA-9 must be explicitly passed
via --cuda-path=.
On LLVM side NVPTX added sm_70 GPU type which bumps required
PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment.
Differential Revision: https://reviews.llvm.org/D37576
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@312734 91177308-0d34-0410-b5e6-96231b3b80d8
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Targets.cpp is getting unwieldy, and even minor changes cause the entire thing
to cause recompilation for everyone. This patch bites the bullet and breaks
it up into a number of files.
I tended to keep function definitions in the class declaration unless it
caused additional includes to be necessary. In those cases, I pulled it
over into the .cpp file. Content is copy/paste for the most part,
besides includes/format/etc.
Differential Revision: https://reviews.llvm.org/D35701
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@308791 91177308-0d34-0410-b5e6-96231b3b80d8
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