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* [AARch64] Add ARMv8.2-A FP16 vector intrinsicsAbderrazek Zaafrani2017-12-211-1/+1
| | | | | | | | Putting back the code that was reverted few weeks ago. Differential Revision: https://reviews.llvm.org/D34161 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@321294 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert clang::LangAS to a strongly typed enumAlexander Richardson2017-10-151-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Convert clang::LangAS to a strongly typed enum Currently both clang AST address spaces and target specific address spaces are represented as unsigned which can lead to subtle errors if the wrong type is passed. It is especially confusing in the CodeGen files as it is not possible to see what kind of address space should be passed to a function without looking at the implementation. I originally made this change for our LLVM fork for the CHERI architecture where we make extensive use of address spaces to differentiate between capabilities and pointers. When merging the upstream changes I usually run into some test failures or runtime crashes because the wrong kind of address space is passed to a function. By converting the LangAS enum to a C++11 we can catch these errors at compile time. Additionally, it is now obvious from the function signature which kind of address space it expects. I found the following errors while writing this patch: - ItaniumRecordLayoutBuilder::LayoutField was passing a clang AST address space to TargetInfo::getPointer{Width,Align}() - TypePrinter::printAttributedAfter() prints the numeric value of the clang AST address space instead of the target address space. However, this code is not used so I kept the current behaviour - initializeForBlockHeader() in CGBlocks.cpp was passing LangAS::opencl_generic to TargetInfo::getPointer{Width,Align}() - CodeGenFunction::EmitBlockLiteral() was passing a AST address space to TargetInfo::getPointerWidth() - CGOpenMPRuntimeNVPTX::translateParameter() passed a target address space to Qualifiers::addAddressSpace() - CGOpenMPRuntimeNVPTX::getParameterAddress() was using llvm::Type::getPointerTo() with a AST address space - clang_getAddressSpace() returns either a LangAS or a target address space. As this is exposed to C I have kept the current behaviour and added a comment stating that it is probably not correct. Other than this the patch should not cause any functional changes. Reviewers: yaxunl, pcc, bader Reviewed By: yaxunl, bader Subscribers: jlebar, jholewinski, nhaehnle, Anastasia, cfe-commits Differential Revision: https://reviews.llvm.org/D38816 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@315871 91177308-0d34-0410-b5e6-96231b3b80d8
* This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it showsSjoerd Meijer2017-07-061-1/+1
| | | | | | | | | problems in testing, see comments in D34161 for some more details. A fix is in progres in D35011, but a revert seems better now as the fix will probably take some more time to land. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@307277 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] ADD ARMv.2-A FP16 vector intrinsicsAbderrazek Zaafrani2017-06-201-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D34161 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@305820 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics"Vedant Kumar2017-06-021-1/+1
| | | | | | | | | | | | This reverts commit r304493. It breaks all the Darwin bots: http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental_check/37168 Failure: Failing Tests (2): Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c Clang :: CodeGen/arm_neon_intrinsics.c git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@304509 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add ARMv8.2-A FP16 vefctor intrinsicsAbderrazek Zaafrani2017-06-011-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@304493 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: Cast alloca to expected address spaceYaxun Liu2017-05-181-0/+4
| | | | | | | | | | | | Alloca always returns a pointer in alloca address space, which may be different from the type defined by the language. For example, in C++ the auto variables are in the default address space. Therefore cast alloca to the expected address space when necessary. Differential Revision: https://reviews.llvm.org/D32248 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@303370 91177308-0d34-0410-b5e6-96231b3b80d8
* CodeGen: Let lifetime intrinsic use alloca address spaceYaxun Liu2017-04-171-0/+6
| | | | | | | Differential Revision: https://reviews.llvm.org/D31717 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@300485 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit [OpenCL] AMDGCN: Fix size_t typeYaxun Liu2016-08-191-0/+5
| | | | | | There was a premature cast to pointer type in emitPointerArithmetic which caused assertion in tests with assertion enabled. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@279206 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert [OpenCL] AMDGCN: Fix size_t typeYaxun Liu2016-08-181-5/+0
| | | | | | due to regressions in test/CodeGen/exprs.c on certain platforms. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@279127 91177308-0d34-0410-b5e6-96231b3b80d8
* [OpenCL] AMDGCN: Fix size_t typeYaxun Liu2016-08-181-0/+5
| | | | | | | | Pointers of certain GPUs in AMDGCN target in private address space is 32 bit but pointers in other address spaces are 64 bit. size_t type should be defined as 64 bit for these GPUs so that it could hold pointers in all address spaces. Also fixed issues in pointer arithmetic codegen by using pointer specific intptr type. Differential Revision: https://reviews.llvm.org/D23361 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@279121 91177308-0d34-0410-b5e6-96231b3b80d8
* Compute and preserve alignment more faithfully in IR-generation.John McCall2015-09-081-0/+108
Introduce an Address type to bundle a pointer value with an alignment. Introduce APIs on CGBuilderTy to work with Address values. Change core APIs on CGF/CGM to traffic in Address where appropriate. Require alignments to be non-zero. Update a ton of code to compute and propagate alignment information. As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment helper function to CGF and made use of it in a number of places in the expression emitter. The end result is that we should now be significantly more correct when performing operations on objects that are locally known to be under-aligned. Since alignment is not reliably tracked in the type system, there are inherent limits to this, but at least we are no longer confused by standard operations like derived-to-base conversions and array-to-pointer decay. I've also fixed a large number of bugs where we were applying the complete-object alignment to a pointer instead of the non-virtual alignment, although most of these were hidden by the very conservative approach we took with member alignment. Also, because IRGen now reliably asserts on zero alignments, we should no longer be subject to an absurd but frustrating recurring bug where an incomplete type would report a zero alignment and then we'd naively do a alignmentAtOffset on it and emit code using an alignment equal to the largest power-of-two factor of the offset. We should also now be emitting much more aggressive alignment attributes in the presence of over-alignment. In particular, field access now uses alignmentAtOffset instead of min. Several times in this patch, I had to change the existing code-generation pattern in order to more effectively use the Address APIs. For the most part, this seems to be a strict improvement, like doing pointer arithmetic with GEPs instead of ptrtoint. That said, I've tried very hard to not change semantics, but it is likely that I've failed in a few places, for which I apologize. ABIArgInfo now always carries the assumed alignment of indirect and indirect byval arguments. In order to cut down on what was already a dauntingly large patch, I changed the code to never set align attributes in the IR on non-byval indirect arguments. That is, we still generate code which assumes that indirect arguments have the given alignment, but we don't express this information to the backend except where it's semantically required (i.e. on byvals). This is likely a minor regression for those targets that did provide this information, but it'll be trivial to add it back in a later patch. I partially punted on applying this work to CGBuiltin. Please do not add more uses of the CreateDefaultAligned{Load,Store} APIs; they will be going away eventually. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@246985 91177308-0d34-0410-b5e6-96231b3b80d8