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* Move the builtin headers to use the new license file header.Chandler Carruth2019-04-081-17/+3
| | | | | | | | | | | | | | | | | | Summary: These all had somewhat custom file headers with different text from the ones I searched for previously, and so I missed them. Thanks to Hal and Kristina and others who prompted me to fix this, and sorry it took so long. Reviewers: hfinkel Subscribers: mcrosier, javed.absar, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D60406 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@357941 91177308-0d34-0410-b5e6-96231b3b80d8
* [Builtins][Attributes][X86] Tag all X86 builtins with their required vector ↵Craig Topper2018-07-091-34/+36
| | | | | | | | | | | | | | | | | | | | | | | | width. Add a min_vector_width function attribute and tag all x86 instrinsics with it This is part of an ongoing attempt at making 512 bit vectors illegal in the X86 backend type legalizer due to CPU frequency penalties associated with wide vectors on Skylake Server CPUs. We want the loop vectorizer to be able to emit IR containing wide vectors as intermediate operations in vectorized code and allow these wide vectors to be legalized to 256 bits by the X86 backend even though we are targetting a CPU that supports 512 bit vectors. This is similar to what happens with an AVX2 CPU, the vectorizer can emit wide vectors and the backend will split them. We want this splitting behavior, but still be able to use new Skylake instructions that work on 256-bit vectors and support things like masking and gather/scatter. Of course if the user uses explicit vector code in their source code we need to not split those operations. Especially if they have used any of the 512-bit vector intrinsics from immintrin.h. And we need to make it so that merely using the intrinsics produces the expected code in order to be backwards compatible. To support this goal, this patch adds a new IR function attribute "min-legal-vector-width" that can indicate the need for a minimum vector width to be legal in the backend. We need to ensure this attribute is set to the largest vector width needed by any intrinsics from immintrin.h that the function uses. The inliner will be reponsible for merging this attribute when a function is inlined. We may also need a way to limit inlining in the future as well, but we can discuss that in the future. To make things more complicated, there are two different ways intrinsics are implemented in immintrin.h. Either as an always_inline function containing calls to builtins(can be target specific or target independent) or vector extension code. Or as a macro wrapper around a taget specific builtin. I believe I've removed all cases where the macro was around a target independent builtin. To support the always_inline function case this patch adds attribute((min_vector_width(128))) that can be used to tag these functions with their vector width. All x86 intrinsic functions that operate on vectors have been tagged with this attribute. To support the macro case, all x86 specific builtins have also been tagged with the vector width that they require. Use of any builtin with this property will implicitly increase the min_vector_width of the function that calls it. I've done this as a new property in the attribute string for the builtin rather than basing it on the type string so that we can opt into it on a per builtin basis and avoid any impact to target independent builtins. There will be future work to support vectors passed as function arguments and supporting inline assembly. And whatever else we can find that isn't covered by this patch. Special thanks to Chandler who suggested this direction and reviewed a preview version of this patch. And thanks to Eric Christopher who has had many conversations with me about this issue. Differential Revision: https://reviews.llvm.org/D48617 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@336583 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Fix the file header name on fmaintrin.hCraig Topper2018-05-111-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@332108 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Use separate builtins for fma4 scalar intrinsics. Use negations to ↵Craig Topper2017-11-251-6/+6
| | | | | | | | | | remove some of the scalar fma3 builtins. fma4 instructions zero the upper bits of the xmm register. fma3 instructions leave the bits unmodified. This requires separate builtins for the different semantics. While we're cleaning up the scalar builtins this also removes the fma3 fmsub/fnmadd/fnmsub builtins by using negates in the header file. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318985 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Reduce the number of FMA builtins needed by the frontend by adding ↵Craig Topper2017-11-101-16/+16
| | | | | | | | | | | | negates to operands of the fmadd and fmaddsub builtins. The backend should be able to combine the negates to create fmsub, fnmadd, and fnmsub. faddsub converting to fsubadd still needs work I think, but should be very doable. This matches what we already do for the masked builtins. This only covers the packed builtins. Scalar builtins will be done after FMA4 is fixed. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317873 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Rename the VEX scalar fma builtins to end with a '3' to match gccCraig Topper2017-11-091-8/+8
| | | | | | | | I think we need to use different builtins for the FMA4 instructions since those instructions zero the upper bits and FMA3 instructions pass the bits through. So this moves the existing builtins to be the FMA3 versions. New versions will be added for FMA4. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@317766 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Add typecasts to remove most assumptions about what __m128i/__m256i is ↵Craig Topper2016-05-161-32/+32
| | | | | | defined as. Add similar typecasts for the fp types as well. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@269632 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Rename DEFAULT_FN_ATTR macro to __DEFAULT_FN_ATTRMichael Kuperstein2015-06-301-34/+34
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@241065 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the intel intrinsic headers to use the target attribute support.Eric Christopher2015-06-171-7/+1
| | | | | | | | | | | | | | | | | | | This involved removing the conditional inclusion and replacing them with target attributes matching the original conditional inclusion and checks. The testcase update removes the macro checks for each file and replaces them with usage of the __target__ attribute, e.g.: int __attribute__((__target__(("sse3")))) foo(int a) { _mm_mwait(0, 0); return 4; } This usage does require the enclosing function have the requisite __target__ attribute for inlining and code generation - also for any macro intrinsic uses in the enclosing function. There's no change for existing uses of the intrinsic headers. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@239883 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a define for per-file function attributes for the Intel intrinsic headers.Eric Christopher2015-06-171-32/+37
| | | | | | | This is a precursor to changing them to use the new target attribute code. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@239882 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fma3 intrinsic header file.Craig Topper2012-06-041-0/+229
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@157913 91177308-0d34-0410-b5e6-96231b3b80d8