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* Bring r325915 back.Rafael Espindola2018-02-231-4/+4
| | | | | | | | | | | | | | | The tests that failed on a windows host have been fixed. Original message: Start setting dso_local for COFF. With this there are still some GVs where we don't set dso_local because setGVProperties is never called. I intend to fix that in followup commits. This is just the bare minimum to teach shouldAssumeDSOLocal what it should do for COFF. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@325940 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Start setting dso_local for COFF."Rafael Espindola2018-02-231-4/+4
| | | | | | | | This reverts commit r325915. It will take some time to fix the failures on a windows host. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@325929 91177308-0d34-0410-b5e6-96231b3b80d8
* Start setting dso_local for COFF.Rafael Espindola2018-02-231-4/+4
| | | | | | | | | With this there are still some GVs where we don't set dso_local because setGVProperties is never called. I intend to fix that in followup commits. This is just the bare minimum to teach shouldAssumeDSOLocal what it should do for COFF. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@325915 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct Vectorcall Register passing and HVA BehaviorErich Keane2017-01-051-3/+3
| | | | | | | | | | | | | | Front end component (back end changes are D27392). The vectorcall calling convention was broken subtly in two cases. First, it didn't properly handle homogeneous vector aggregates (HVAs). Second, the vectorcall specification requires that only the first 6 parameters be eligible for register assignment. This patch fixes both issues. Differential Revision: https://reviews.llvm.org/D27529 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@291041 91177308-0d34-0410-b5e6-96231b3b80d8
* [test] Fix typos in a few tests (NFC)Vedant Kumar2015-08-231-1/+1
| | | | | | Patch by Kai Zhao! git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@245817 91177308-0d34-0410-b5e6-96231b3b80d8
* Update Clang tests to handle explicitly typed load changes in LLVM.David Blaikie2015-02-271-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@230795 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure that arm-linux-gnu is still the apcs-gnu ABI when weEric Christopher2014-12-181-1/+1
| | | | | | | | | | | | use clang -cc1 matching the front end and backend. Fix up a couple of tests that were testing aapcs for arm-linux-gnu. The test that removes the aapcs abi calling convention removes them because the default triple matches what the backend uses for the calling convention there and so it doesn't need to be explicitly stated - see the code in TargetInfo.cpp. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@224491 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: simplify PCS mapping.Tim Northover2014-11-271-30/+9
| | | | | | | | | | | | Now that LLVM can count the registers needed to implement AAPCS rules, we don't need to duplicate that logic here. This means we can drop the explicit padding and also use more natural types in many cases (e.g. "struct { float arr[3]; }" used to end up as "[2 x double]" to avoid holes on the stack. The one wrinkle is that AAPCS va_arg was also using the register counting machinery. But the local replacement isn't too bad. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@222904 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM ABI: simplify decisions on whether args can be expanded.Tim Northover2014-11-071-2/+2
| | | | | | | | | | | | Homogeneous aggregates on AAPCS_VFP ARM need to be passed *without* being flattened (e.g. [2 x float] rather than "float, float") for various weird ABI reasons. However, this isn't the case for anything else; further, we know at the ABIArgInfo::getDirect callsites whether this flattening is allowed. So, we can get more unified ARM code, with a simpler Clang, by just using that knowledge directly. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@221559 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement IRGen for the x86 vectorcall conventionReid Kleckner2014-10-311-6/+39
| | | | | | | | | | | | | | | The most complex aspect of the convention is the handling of homogeneous vector and floating point aggregates. Reuse the homogeneous aggregate classification code that we use on PPC64 and ARM for this. This convention also has a C mangling, and we apparently implement that in both Clang and LLVM. Reviewed By: majnemer Differential Revision: http://reviews.llvm.org/D6063 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@221006 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix ARM HVA classification of classes with non-virtual basesReid Kleckner2014-10-311-0/+94
Reuse the PPC64 HVA detection algorithm for ARM and AArch64. This is a nice code deduplication, since they are roughly identical. A few virtual method extension points are needed to understand how big an HVA can be and what element types it can have for a given architecture. Also make the record expansion code work in the presence of non-virtual bases. Reviewed By: uweigand, asl Differential Revision: http://reviews.llvm.org/D6045 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@220972 91177308-0d34-0410-b5e6-96231b3b80d8