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* [X86] Use AVX features instead of ABI to init. SimdDefaultAlign.Ahmed Bougacha2015-08-271-0/+3
| | | | | | | | | | | | | | | | The ABI string only exists to communicate with TargetCodeGenInfo. Concretely, since we only used "avx*" ABI strings on x86_64 (as AVX doesn't affect the i386 ABIs), this meant that, when initializing SimdDefaultAlign, we would ignore AVX/AVX512 on i386, for no good reason. Instead, directly check the features. A similar change for MaxVectorAlign will follow. Differential Revision: http://reviews.llvm.org/D12390 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@246228 91177308-0d34-0410-b5e6-96231b3b80d8
* [OPENMP 4.1] Add codegen for 'simdlen' clause.Alexey Bataev2015-08-211-0/+64
| | | | | | | | | | Add emission of metadata for simd loops in presence of 'simdlen' clause. If 'simdlen' clause is provided without 'safelen' clause, the vectorizer width for the loop is set to value of 'simdlen' clause + all read/write ops in loop are marked with '!llvm.mem.parallel_loop_access' metadata. If 'simdlen' clause is provided along with 'safelen' clause, the vectorizer width for the loop is set to value of 'simdlen' clause + all read/write ops in loop are not marked with '!llvm.mem.parallel_loop_access' metadata. If 'safelen' clause is provided without 'simdlen' clause, the vectorizer width for the loop is set to value of 'safelen' clause + all read/write ops in loop are not marked with '!llvm.mem.parallel_loop_access' metadata. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@245697 91177308-0d34-0410-b5e6-96231b3b80d8
* [CodeGen] Teach X86_64ABIInfo about AVX512.Ahmed Bougacha2015-06-221-0/+3
| | | | | | | | | | | | | | | | | As specified in the SysV AVX512 ABI drafts. It follows the same scheme as AVX2: Arguments of type __m512 are split into eight eightbyte chunks. The least significant one belongs to class SSE and all the others to class SSEUP. This also means we change the OpenMP SIMD default alignment on AVX512. Based on r240337. Differential Revision: http://reviews.llvm.org/D9894 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@240338 91177308-0d34-0410-b5e6-96231b3b80d8
* [OpenMP] Test AVX default SIMD alignment. NFC.Ahmed Bougacha2015-05-221-6/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@237991 91177308-0d34-0410-b5e6-96231b3b80d8
* [OPENMP] -fopenmp enables OpenMP support (fix for http://llvm.org/PR23492)Alexey Bataev2015-05-201-3/+3
| | | | | | | | -fopenmp turns on OpenMP support and links libiomp5 as OpenMP library. Also there is -fopenmp={libiomp5|libgomp} option that allows to override effect of -fopenmp and link libgomp library (if -fopenmp=libgomp is specified). Differential Revision: http://reviews.llvm.org/D9736 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@237769 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] ABI support for the QPX vector instruction setHal Finkel2015-03-111-3/+5
| | | | | | | | | | | | | | Support for the QPX vector instruction set, used on the IBM BG/Q supercomputer, has recently been added to the LLVM PowerPC backend. This vector instruction set requires some ABI modifications because the ABI on the BG/Q expects <4 x double> vectors to be provided with 32-byte stack alignment, and to be handled as native vector types (similar to how Altivec vectors are handled on mainline PPC systems). I've named this ABI variant elfv1-qpx, have made this the default ABI when QPX is supported, and have updated the ABI handling code to provide QPX vectors with the correct stack alignment and associated register-assignment logic. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@231960 91177308-0d34-0410-b5e6-96231b3b80d8
* IR: Add 'distinct' MDNodes to bitcode and assembly (clang)Duncan P. N. Exon Smith2015-01-081-3/+3
| | | | | | | | | Update testcases for LLVM change in r225474 to make `MDNode`s explicitly distinct (when they aren't uniqued). Part of PR22111. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@225475 91177308-0d34-0410-b5e6-96231b3b80d8
* IR: Make metadata typeless in assembly, clang sideDuncan P. N. Exon Smith2014-12-151-5/+5
| | | | | | Match LLVM changes from r224257. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@224259 91177308-0d34-0410-b5e6-96231b3b80d8
* Add getOpenMPSimdDefaultAlignment for PowerPCHal Finkel2014-10-031-0/+1
| | | | | | | | | | | | When the aligned clause of an OpenMP simd pragma is not provided with an explicit alignment, a target-dependent default must be used. This adds such a default of PPC targets. This will become slightly more complicated when BG/Q support is added (because then it will depend on the type). For now, 16 is a correct value for all systems, and covers Altivec and VSX vectors. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@218994 91177308-0d34-0410-b5e6-96231b3b80d8
* [OPENMP] Codegen of the ‘aligned’ clause for the ‘omp simd’ directive.Alexander Musman2014-09-301-3/+15
| | | | | | | Differential Revision: http://reviews.llvm.org/D5499 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@218660 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename loop unrolling and loop vectorizer metadata to have a common prefix.Eli Bendersky2014-06-251-3/+2
| | | | | | | | | | | | | | | | | | | | | [Clang part] These patches rename the loop unrolling and loop vectorizer metadata such that they have a common 'llvm.loop.' prefix. Metadata name changes: llvm.vectorizer.* => llvm.loop.vectorizer.* llvm.loopunroll.* => llvm.loop.unroll.* This was a suggestion from an earlier review (http://reviews.llvm.org/D4090) which added the loop unrolling metadata. Patch by Mark Heffernan. git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@211712 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch adds a helper class (CGLoopInfo) for marking memory instructions ↵Alexander Musman2014-05-221-0/+52
with llvm.mem.parallel_loop_access metadata. It also adds a simple initial version of codegen for pragma omp simd (it will change in the future to support all the clauses). Differential revision: http://reviews.llvm.org/D3644 git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@209411 91177308-0d34-0410-b5e6-96231b3b80d8
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