From 950ec566ee8f1b5df4462f96c02d4d689ff630df Mon Sep 17 00:00:00 2001 From: Yi Kong Date: Wed, 23 Jul 2014 19:55:09 +0000 Subject: Merging r213733: ------------------------------------------------------------------------ r213733 | kongyi | 2014-07-23 10:25:02 +0100 (Wed, 23 Jul 2014) | 5 lines ARM: Add doc for ACLE memory barrier intrinsics Add documentations for ACLE memory barrier intrinsics, describing their motion barrier characteristics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/cfe/branches/release_35@213787 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/LanguageExtensions.rst | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/docs/LanguageExtensions.rst b/docs/LanguageExtensions.rst index 4c600868e9..50e1ccebe8 100644 --- a/docs/LanguageExtensions.rst +++ b/docs/LanguageExtensions.rst @@ -1634,6 +1634,19 @@ Target-Specific Extensions Clang supports some language features conditionally on some targets. +ARM/AArch64 Language Extensions +------------------------------- + +Memory Barrier Intrinsics +^^^^^^^^^^^^^^^^^^^^^^^^^ +Clang implements the ``__dmb``, ``__dsb`` and ``__isb`` intrinsics as defined +in the `ARM C Language Extensions Release 2.0 +`_. +Note that these intrinsics are implemented as motion barriers that block +reordering of memory accesses and side effect instructions. Other instructions +like simple arithmatic may be reordered around the intrinsic. If you expect to +have no reordering at all, use inline assembly instead. + X86/X86-64 Language Extensions ------------------------------ -- cgit v1.2.3