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| author | Alexey Bataev <a.bataev@outlook.com> | 2024-01-23 11:34:11 -0800 |
|---|---|---|
| committer | Alexey Bataev <a.bataev@outlook.com> | 2024-01-23 12:44:49 -0800 |
| commit | bb3e0d7fc34899f22cbaea311982098bae3de061 (patch) | |
| tree | f9e5d6c243fe4a1bea16410c6d3bc3bfc31689fe | |
| parent | b504e97d921d72cc4407ab909ec371d1af957ab7 (diff) | |
[SLP]Fix PR79193: skip analysis of gather nodes for minbitwidth.
No need in trying to analyze small graphs with gather node only to avoid
crash.
| -rw-r--r-- | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-non-vector-root.ll | 16 |
2 files changed, 17 insertions, 1 deletions
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp index 809d740aae3e..601d2454c1e1 100644 --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -13183,7 +13183,7 @@ void BoUpSLP::computeMinimumValueSizes() { // We only attempt to truncate integer expressions. auto &TreeRoot = VectorizableTree[0]->Scalars; auto *TreeRootIT = dyn_cast<IntegerType>(TreeRoot[0]->getType()); - if (!TreeRootIT) + if (!TreeRootIT || VectorizableTree.front()->State == TreeEntry::NeedToGather) return; // Ensure the roots of the vectorizable tree don't form a cycle. diff --git a/llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-non-vector-root.ll b/llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-non-vector-root.ll new file mode 100644 index 000000000000..6524b378f3d8 --- /dev/null +++ b/llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-non-vector-root.ll @@ -0,0 +1,16 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 +; RUN: opt -passes=slp-vectorizer -S -slp-optimize-identity-hor-reduction-ops=false < %s -mtriple=s390x-ibm-linux -mcpu=arch13 | FileCheck %s + +define void @foo() { +; CHECK-LABEL: define void @foo( +; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> zeroinitializer) +; CHECK-NEXT: store i32 [[TMP1]], ptr null, align 4 +; CHECK-NEXT: ret void +; + %1 = add i32 0, 0 + %2 = add i32 %1, 0 + %3 = add i32 %2, 0 + store i32 %3, ptr null, align 4 + ret void +} |