diff options
author | Alexey Bataev <a.bataev@outlook.com> | 2024-03-28 18:02:26 -0700 |
---|---|---|
committer | Alexey Bataev <a.bataev@outlook.com> | 2024-03-28 18:02:26 -0700 |
commit | 01e02e0b6a15562e241e9ed18b295c66ae20f410 (patch) | |
tree | de9c41e712f025729cdfe6fc80ea5f581f9d30e5 | |
parent | 338be798cae42107dd90b2bd0e88b379741a1d60 (diff) |
[SLP]Fix PR87011: Do not assume that initial ext/trunc nodes can be
represented by bitwidth without analysis.
Need to check that initial ext/trunc nodes can be safely represented
using calculated bitwidth before applying it.
-rw-r--r-- | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 12 | ||||
-rw-r--r-- | llvm/test/Transforms/SLPVectorizer/RISCV/init-ext-node-not-truncable.ll | 4 |
2 files changed, 11 insertions, 5 deletions
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp index a264dee00bae..2875e71081d9 100644 --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -14450,9 +14450,15 @@ void BoUpSLP::computeMinimumValueSizes() { ReductionBitWidth = 0; } - for (unsigned Idx : RootDemotes) - ToDemote.append(VectorizableTree[Idx]->Scalars.begin(), - VectorizableTree[Idx]->Scalars.end()); + for (unsigned Idx : RootDemotes) { + Value *V = VectorizableTree[Idx]->Scalars.front(); + uint32_t OrigBitWidth = DL->getTypeSizeInBits(V->getType()); + if (OrigBitWidth > MaxBitWidth) { + APInt Mask = APInt::getBitsSetFrom(OrigBitWidth, MaxBitWidth); + if (MaskedValueIsZero(V, Mask, SimplifyQuery(*DL))) + ToDemote.push_back(V); + } + } RootDemotes.clear(); IsTopRoot = false; IsProfitableToDemoteRoot = true; diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/init-ext-node-not-truncable.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/init-ext-node-not-truncable.ll index f6d1baf44a76..436fba3261d6 100644 --- a/llvm/test/Transforms/SLPVectorizer/RISCV/init-ext-node-not-truncable.ll +++ b/llvm/test/Transforms/SLPVectorizer/RISCV/init-ext-node-not-truncable.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 -; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr="+v" < %s | FileCheck %s +; RUN: opt -S --passes=slp-vectorizer -mtriple=riscv64-unknown-linux-gnu -mattr="+v" < %s -slp-threshold=-5 | FileCheck %s @h = global [16 x i64] zeroinitializer @@ -7,7 +7,7 @@ define void @test() { ; CHECK-LABEL: define void @test( ; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: store <2 x i64> <i64 1, i64 0>, ptr @h, align 8 +; CHECK-NEXT: store <2 x i64> <i64 -1, i64 0>, ptr @h, align 8 ; CHECK-NEXT: ret void ; entry: |