diff options
| author | XinWang10 <108658776+XinWang10@users.noreply.github.com> | 2024-01-17 21:06:56 -0800 |
|---|---|---|
| committer | Vitaly Buka <vitalybuka@google.com> | 2024-01-17 21:06:56 -0800 |
| commit | fff88f584eb757f966a9121e3d8704221de97291 (patch) | |
| tree | 74dee20dc9651692b382de31a88bcea2e8027204 | |
| parent | cbdd94e111df298caa38b007b1f46a82a7bac73a (diff) | |
| parent | f6617091a982c0802e9b980f2ce7e11a1355c38b (diff) | |
[𝘀𝗽𝗿] changes introduced through rebaseupstream/users/vitalybuka/spr/main.ci-add-lld-as-compiler-rt-dependecy
Created using spr 1.3.4
[skip ci]
28 files changed, 1442 insertions, 1059 deletions
diff --git a/.github/workflows/release-binaries.yml b/.github/workflows/release-binaries.yml index 58bafc3853da..ebf6fa41898d 100644 --- a/.github/workflows/release-binaries.yml +++ b/.github/workflows/release-binaries.yml @@ -1,20 +1,29 @@ name: Release Binaries on: - push: - tags: - - 'llvmorg-*' workflow_dispatch: inputs: + release-version: + description: 'Release Version' + required: true + type: string upload: description: 'Upload binaries to the release page' required: true - default: true + default: false type: boolean - tag: - description: 'Tag to build' + + workflow_call: + inputs: + release-version: + description: 'Release Version' required: true type: string + upload: + description: 'Upload binaries to the release page' + required: true + default: false + type: boolean schedule: # * is a special character in YAML so you have to quote this string - cron: '0 8 1 * *' @@ -26,21 +35,26 @@ jobs: prepare: name: Prepare to build binaries runs-on: ubuntu-22.04 - if: github.repository == 'llvm/llvm-project' outputs: - release-version: ${{ steps.validate-tag.outputs.release-version }} - flags: ${{ steps.validate-tag.outputs.flags }} - build-dir: ${{ steps.validate-tag.outputs.build-dir }} - rc-flags: ${{ steps.validate-tag.outputs.rc-flags }} - ref: ${{ steps.validate-tag.outputs.ref }} - upload: ${{ steps.validate-tag.outputs.upload }} + release-version: ${{ steps.vars.outputs.release-version }} + flags: ${{ steps.vars.outputs.flags }} + build-dir: ${{ steps.vars.outputs.build-dir }} + rc-flags: ${{ steps.vars.outputs.rc-flags }} + ref: ${{ steps.vars.outputs.ref }} + upload: ${{ steps.vars.outputs.upload }} steps: - name: Checkout LLVM uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 - - name: Validate and parse tag - id: validate-tag + - name: Check Permissions + env: + GITHUB_TOKEN: ${{ github.token }} + run: | + ./llvm/utils/release/./github-upload-release.py --token "$GITHUB_TOKEN" --user ${{ github.actor }} check-permissions + + - name: Collect Variables + id: vars # In order for the test-release.sh script to run correctly, the LLVM # source needs to be at the following location relative to the build dir: # | X.Y.Z-rcN | ./rcN/llvm-project @@ -61,9 +75,9 @@ jobs: if [ -n "${{ inputs.upload }}" ]; then upload="${{ inputs.upload }}" else - upload="true" + upload="false" fi - bash .github/workflows/set-release-binary-outputs.sh "${{ github.actor }}" "$tag" "$upload" + bash .github/workflows/set-release-binary-outputs.sh "$tag" "$upload" # Try to get around the 6 hour timeout by first running a job to fill # the build cache. diff --git a/.github/workflows/release-documentation.yml b/.github/workflows/release-documentation.yml new file mode 100644 index 000000000000..64572906988b --- /dev/null +++ b/.github/workflows/release-documentation.yml @@ -0,0 +1,88 @@ +name: Release Documentation + +permissions: + contents: read + +on: + workflow_dispatch: + inputs: + release-version: + description: 'Release Version' + required: true + type: string + upload: + description: 'Upload documentation' + required: false + type: boolean + + workflow_call: + inputs: + release-version: + description: 'Release Version' + required: true + type: string + upload: + description: 'Upload documentation' + required: false + type: boolean + +jobs: + release-documentation: + name: Build and Upload Release Documentation + runs-on: ubuntu-latest + env: + upload: ${{ inputs.upload && !contains(inputs.release-version, 'rc') }} + steps: + - name: Checkout LLVM + uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 + + - name: Setup Python env + uses: actions/setup-python@v4 + with: + cache: 'pip' + cache-dependency-path: './llvm/docs/requirements.txt' + + - name: Install Dependencies + run: | + sudo apt-get update + sudo apt-get install -y \ + graphviz \ + python3-github \ + ninja-build \ + texlive-font-utils + pip3 install --user -r ./llvm/docs/requirements.txt + + - name: Build Documentation + env: + GITHUB_TOKEN: ${{ github.token }} + run: | + ./llvm/utils/release/build-docs.sh -release "${{ inputs.release-version }}" -no-doxygen + + - name: Create Release Notes Artifact + uses: actions/upload-artifact@v3 + with: + name: release-notes + path: docs-build/html-export/ + + - name: Clone www-releases + if: env.upload + uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 + with: + repository: ${{ github.repository_owner }}/www-releases + ref: main + fetch-depth: 0 + path: www-releases + + - name: Upload Release Notes + if: env.upload + env: + WWW_RELEASES_TOKEN: ${{ secrets.WWW_RELEASES_TOKEN }} + run: | + mkdir -p ../www-releases/${{ inputs.release-version }} + mv ./docs-build/html-export/* ../www-releases/${{ inputs.release-version }} + cd ../www-releases + git add ${{ inputs.release-version }} + git config user.email "llvmbot@llvm.org" + git config user.name "llvmbot" + git commit -a -m "Add ${{ inputs.release-version }} documentation" + git push "https://$WWW_RELEASES_TOKEN@github.com/${{ github.repository_owner }}/www-releases" main:main diff --git a/.github/workflows/release-doxygen.yml b/.github/workflows/release-doxygen.yml new file mode 100644 index 000000000000..5e322849a1d0 --- /dev/null +++ b/.github/workflows/release-doxygen.yml @@ -0,0 +1,67 @@ +name: Release Doxygen + +permissions: + contents: read + +on: + workflow_dispatch: + inputs: + release-version: + description: 'Release Version' + required: true + type: string + upload: + description: 'Upload documentation' + required: false + type: boolean + + workflow_call: + inputs: + release-version: + description: 'Release Version' + required: true + type: string + upload: + description: 'Upload documentation' + required: false + type: boolean + +jobs: + release-doxygen: + name: Build and Upload Release Doxygen + runs-on: ubuntu-latest + permissions: + contents: write + env: + upload: ${{ inputs.upload && !contains(inputs.release-version, 'rc') }} + steps: + - name: Checkout LLVM + uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 + + - name: Setup Python env + uses: actions/setup-python@v4 + with: + cache: 'pip' + cache-dependency-path: './llvm/docs/requirements.txt' + + - name: Install Dependencies + run: | + sudo apt-get update + sudo apt-get install -y \ + doxygen \ + graphviz \ + python3-github \ + ninja-build \ + texlive-font-utils + pip3 install --user -r ./llvm/docs/requirements.txt + + - name: Build Doxygen + env: + GITHUB_TOKEN: ${{ github.token }} + run: | + ./llvm/utils/release/build-docs.sh -release "${{ inputs.release-version }}" -no-sphinx + + - name: Upload Doxygen + if: env.upload + run: | + ./llvm/utils/release/github-upload-release.py --token "$GITHUB_TOKEN" --release "${{ inputs.release-version }}" --user "${{ github.actor }}" upload --files ./*doxygen*.tar.xz diff --git a/.github/workflows/release-lit.yml b/.github/workflows/release-lit.yml new file mode 100644 index 000000000000..36b0b6edd518 --- /dev/null +++ b/.github/workflows/release-lit.yml @@ -0,0 +1,74 @@ +name: Release Lit + +permissions: + contents: read + +on: + workflow_dispatch: + inputs: + release-version: + description: 'Release Version' + required: true + type: string + + workflow_call: + inputs: + release-version: + description: 'Release Version' + required: true + type: string + +jobs: + release-lit: + name: Release Lit + runs-on: ubuntu-latest + steps: + - name: Checkout LLVM + uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 + with: + ref: "llvmorg-${{ inputs.release-version }}" + + - name: Install dependencies + run: | + sudo apt-get update + sudo apt-get install -y python3-setuptools python3-psutil python3-github + + - name: Check Permissions + env: + GITHUB_TOKEN: ${{ github.token }} + run: | + ./llvm/utils/release/./github-upload-release.py --token "$GITHUB_TOKEN" --user ${{ github.actor }} check-permissions + + - name: Setup Cpp + uses: aminya/setup-cpp@v1 + with: + compiler: llvm-16.0.6 + cmake: true + ninja: true + + - name: Test lit + run: | + mkdir build && cd build + export FILECHECK_OPTS='-dump-input-filter=all -vv -color' + cmake ../llvm -DCMAKE_BUILD_TYPE=Release -G Ninja + ninja -v -j $(nproc) check-lit + + - name: Package lit + run: | + cd llvm/utils/lit + # Remove 'dev' suffix from lit version. + sed -i 's/ + "dev"//g' lit/__init__.py + python3 setup.py sdist + + - name: Upload lit to test.pypi.org + uses: pypa/gh-action-pypi-publish@release/v1 + with: + password: ${{ secrets.LLVM_LIT_TEST_PYPI_API_TOKEN }} + repository-url: https://test.pypi.org/legacy/ + packages-dir: llvm/utils/lit/dist/ + + - name: Upload lit to pypi.org + uses: pypa/gh-action-pypi-publish@release/v1 + with: + password: ${{ secrets.LLVM_LIT_PYPI_API_TOKEN }} + packages-dir: llvm/utils/lit/dist/ diff --git a/.github/workflows/release-tasks.yml b/.github/workflows/release-tasks.yml index fd28edf55bc4..f2a831ad3577 100644 --- a/.github/workflows/release-tasks.yml +++ b/.github/workflows/release-tasks.yml @@ -1,7 +1,7 @@ name: Release Task permissions: - contents: read + contents: write on: push: @@ -10,112 +10,70 @@ on: - 'llvmorg-*' jobs: - release-tasks: - permissions: - contents: write # To upload assets to release. + validate-tag: + name: Validate Tag runs-on: ubuntu-latest if: github.repository == 'llvm/llvm-project' + outputs: + release-version: ${{ steps.validate-tag.outputs.release-version }} steps: - name: Validate Tag id: validate-tag run: | - test "${{ github.actor }}" = "tstellar" || test "${{ github.actor }}" = "tru" echo "${{ github.ref_name }}" | grep -e '^llvmorg-[0-9]\+\.[0-9]\+\.[0-9]\+\(-rc[0-9]\+\)\?$' release_version=$(echo "${{ github.ref_name }}" | sed 's/llvmorg-//g') echo "release-version=$release_version" >> "$GITHUB_OUTPUT" - - name: Checkout LLVM - uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 - + release-create: + name: Create a New Release + runs-on: ubuntu-latest + needs: validate-tag + steps: - name: Install Dependencies run: | sudo apt-get update - sudo apt-get install -y \ - doxygen \ - graphviz \ - python3-github \ - ninja-build \ - texlive-font-utils - pip3 install --user --require-hashes -r ./llvm/docs/requirements-hashed.txt - - - name: Create Release - run: | - ./llvm/utils/release/./github-upload-release.py --token ${{ github.token }} --release ${{ steps.validate-tag.outputs.release-version }} create - - - name: Build Documentation - run: | - ./llvm/utils/release/build-docs.sh -release ${{ steps.validate-tag.outputs.release-version }} - ./llvm/utils/release/github-upload-release.py --token ${{ github.token }} --release ${{ steps.validate-tag.outputs.release-version }} upload --files ./*doxygen*.tar.xz - - - name: Create Release Notes Artifact - uses: actions/upload-artifact@a8a3f3ad30e3422c9c7b888a15615d19a852ae32 # v3.1.3 - with: - name: release-notes - path: docs-build/html-export/ - - - name: Clone www-releases - if: ${{ !contains(steps.validate-tag.outputs.release-version, 'rc') }} - uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 - with: - repository: ${{ github.repository_owner }}/www-releases - ref: main - fetch-depth: 0 - path: www-releases - - - name: Upload Release Notes - if: ${{ !contains(steps.validate-tag.outputs.release-version, 'rc') }} - run: | - mkdir -p ../www-releases/${{ steps.validate-tag.outputs.release-version }} - mv ./docs-build/html-export/* ../www-releases/${{ steps.validate-tag.outputs.release-version }} - cd ../www-releases - git add ${{ steps.validate-tag.outputs.release-version }} - git config user.email "llvmbot@llvm.org" - git config user.name "llvmbot" - git commit -a -m "Add ${{ steps.validate-tag.outputs.release-version }} documentation" - git push https://${{ secrets.WWW_RELEASES_TOKEN }}@github.com/${{ github.repository_owner }}/www-releases main:main + sudo apt-get install python3-github - release-lit: - runs-on: ubuntu-latest - if: github.repository == 'llvm/llvm-project' - steps: - name: Checkout LLVM uses: actions/checkout@b4ffde65f46336ab88eb53be808477a3936bae11 # v4.1.1 - - name: Setup Cpp - uses: aminya/setup-cpp@6e563b8e5f796db317104d19605a414345807897 # v1 - with: - compiler: llvm-16.0.6 - cmake: true - ninja: true - - - name: Install dependencies - run: | - sudo apt-get update - sudo apt-get install -y python3-setuptools python3-psutil - - - name: Test lit - run: | - mkdir build && cd build - export FILECHECK_OPTS='-dump-input-filter=all -vv -color' - cmake ../llvm -DCMAKE_BUILD_TYPE=Release -G Ninja - ninja -v -j $(nproc) check-lit - - - name: Package lit + - name: Create Release + env: + GITHUB_TOKEN: ${{ github.token }} run: | - cd llvm/utils/lit - # Remove 'dev' suffix from lit version. - sed -i 's/ + "dev"//g' lit/__init__.py - python3 setup.py sdist - - - name: Upload lit to test.pypi.org - uses: pypa/gh-action-pypi-publish@2f6f737ca5f74c637829c0f5c3acd0e29ea5e8bf # release/v1 - with: - password: ${{ secrets.LLVM_LIT_TEST_PYPI_API_TOKEN }} - repository-url: https://test.pypi.org/legacy/ - packages-dir: llvm/utils/lit/dist/ + ./llvm/utils/release/./github-upload-release.py --token "$GITHUB_TOKEN" --release ${{ needs.validate-tag.outputs.release-version }} --user ${{ github.actor }} create + release-documentation: + name: Build and Upload Release Documentation + needs: + - validate-tag + uses: ./.github/workflows/release-documentation.yml + with: + release-version: ${{ needs.validate-tag.outputs.release-version }} + upload: true + + release-doxygen: + name: Build and Upload Release Doxygen + needs: + - validate-tag + - release-create + uses: ./.github/workflows/release-doxygen.yml + with: + release-version: ${{ needs.validate-tag.outputs.release-version }} + upload: true - - name: Upload lit to pypi.org - uses: pypa/gh-action-pypi-publish@2f6f737ca5f74c637829c0f5c3acd0e29ea5e8bf # release/v1 - with: - password: ${{ secrets.LLVM_LIT_PYPI_API_TOKEN }} - packages-dir: llvm/utils/lit/dist/ + release-lit: + name: Release Lit + needs: validate-tag + uses: ./.github/workflows/release-lit.yml + with: + release-version: ${{ needs.validate-tag.outputs.release-version }} + + release-binaries: + name: Build Release Binaries + needs: + - validate-tag + - release-create + uses: ./.github/workflows/release-binaries.yml + with: + release-version: ${{ needs.validate-tag.outputs.release-version }} + upload: true diff --git a/.github/workflows/set-release-binary-outputs.sh b/.github/workflows/set-release-binary-outputs.sh index 9bc459a24e80..59470cf83ba7 100644 --- a/.github/workflows/set-release-binary-outputs.sh +++ b/.github/workflows/set-release-binary-outputs.sh @@ -8,14 +8,8 @@ if [ -z "$GITHUB_OUTPUT" ]; then echo "Writing output variables to $GITHUB_OUTPUT" fi -github_user=$1 -tag=$2 -upload=$3 - -if [[ "$github_user" != "tstellar" && "$github_user" != "tru" ]]; then - echo "ERROR: User not allowed: $github_user" - exit 1 -fi +tag=$1 +upload=$2 if echo $tag | grep -e '^[0-9a-f]\+$'; then # This is a plain commit. diff --git a/clang/test/CodeGen/target-builtin-noerror.c b/clang/test/CodeGen/target-builtin-noerror.c index 505f4a3e9456..06bb40a2b71e 100644 --- a/clang/test/CodeGen/target-builtin-noerror.c +++ b/clang/test/CodeGen/target-builtin-noerror.c @@ -82,6 +82,8 @@ void verifyfeaturestrings(void) { (void)__builtin_cpu_supports("avx512bitalg"); (void)__builtin_cpu_supports("avx512bf16"); (void)__builtin_cpu_supports("avx512vp2intersect"); + (void)__builtin_cpu_supports("f16c"); + (void)__builtin_cpu_supports("avx512fp16"); } void verifycpustrings(void) { diff --git a/clang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp b/clang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp index ef2498bd7e14..183eb4fb6ac6 100644 --- a/clang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp +++ b/clang/test/CodeGenCXX/attr-cpuspecific-outoflinedefs.cpp @@ -80,8 +80,8 @@ OutOfLineDefs::foo(int, int, int) { // LINUX: define dso_local noundef i32 @_ZN13OutOfLineDefs3fooEiii.S // LINUX: define dso_local noundef i32 @_ZN13OutOfLineDefs3fooEiii.R // LINUX: define weak_odr ptr @_ZN13OutOfLineDefs3fooEiii.resolver() -// LINUX: ret ptr @_ZN13OutOfLineDefs3fooEiii.R // LINUX: ret ptr @_ZN13OutOfLineDefs3fooEiii.S +// LINUX: ret ptr @_ZN13OutOfLineDefs3fooEiii.R // LINUX: ret ptr @_ZN13OutOfLineDefs3fooEiii.O // LINUX: call void @llvm.trap // LINUX: define linkonce_odr noundef i32 @_ZN13OutOfLineDefs3fooEiii.O @@ -89,8 +89,8 @@ OutOfLineDefs::foo(int, int, int) { // WINDOWS: define dso_local noundef i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z.S" // WINDOWS: define dso_local noundef i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z.R" // WINDOWS: define weak_odr dso_local i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z"(ptr %0, i32 %1, i32 %2, i32 %3) -// WINDOWS: musttail call i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z.R"(ptr %0, i32 %1, i32 %2, i32 %3) // WINDOWS: musttail call i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z.S"(ptr %0, i32 %1, i32 %2, i32 %3) +// WINDOWS: musttail call i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z.R"(ptr %0, i32 %1, i32 %2, i32 %3) // WINDOWS: musttail call i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z.O"(ptr %0, i32 %1, i32 %2, i32 %3) // WINDOWS: call void @llvm.trap // WINDOWS: define linkonce_odr dso_local noundef i32 @"?foo@OutOfLineDefs@@QEAAHHHH@Z.O" diff --git a/compiler-rt/lib/builtins/cpu_model/x86.c b/compiler-rt/lib/builtins/cpu_model/x86.c index 9d9a5d3f1542..0750e29f989a 100644 --- a/compiler-rt/lib/builtins/cpu_model/x86.c +++ b/compiler-rt/lib/builtins/cpu_model/x86.c @@ -148,7 +148,8 @@ enum ProcessorFeatures { FEATURE_LZCNT, FEATURE_MOVBE, - FEATURE_X86_64_BASELINE = 95, + FEATURE_AVX512FP16 = 94, + FEATURE_X86_64_BASELINE, FEATURE_X86_64_V2, FEATURE_X86_64_V3, FEATURE_X86_64_V4, @@ -812,6 +813,8 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf, setFeature(FEATURE_AVX5124FMAPS); if (HasLeaf7 && ((EDX >> 8) & 1) && HasAVX512Save) setFeature(FEATURE_AVX512VP2INTERSECT); + if (HasLeaf7 && ((EDX >> 23) & 1) && HasAVX512Save) + setFeature(FEATURE_AVX512FP16); // EAX from subleaf 0 is the maximum subleaf supported. Some CPUs don't // return all 0s for invalid subleaves so check the limit. diff --git a/compiler-rt/lib/dfsan/dfsan_custom.cpp b/compiler-rt/lib/dfsan/dfsan_custom.cpp index 05b48fd0525e..c5c14a2d1b0e 100644 --- a/compiler-rt/lib/dfsan/dfsan_custom.cpp +++ b/compiler-rt/lib/dfsan/dfsan_custom.cpp @@ -2792,7 +2792,7 @@ int __dfsw_sprintf(char *str, const char *format, dfsan_label str_label, va_list ap; va_start(ap, ret_label); - int ret = format_buffer(str, ~0ul, format, va_labels, ret_label, nullptr, + int ret = format_buffer(str, INT32_MAX, format, va_labels, ret_label, nullptr, nullptr, ap); va_end(ap); return ret; @@ -2806,8 +2806,8 @@ int __dfso_sprintf(char *str, const char *format, dfsan_label str_label, dfsan_origin *ret_origin, ...) { va_list ap; va_start(ap, ret_origin); - int ret = format_buffer(str, ~0ul, format, va_labels, ret_label, va_origins, - ret_origin, ap); + int ret = format_buffer(str, INT32_MAX, format, va_labels, ret_label, + va_origins, ret_origin, ap); va_end(ap); return ret; } diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp b/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp index 8438e019591b..253dc10607a6 100644 --- a/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp +++ b/compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp @@ -34,8 +34,7 @@ static bool FrameIsInternal(const SymbolizedStack *frame) { return true; const char *file = frame->info.file; const char *module = frame->info.module; - if (file && (internal_strstr(file, "/compiler-rt/lib/") || - internal_strstr(file, "/include/c++/"))) + if (file && (internal_strstr(file, "/compiler-rt/lib/"))) return true; if (module && (internal_strstr(module, "libclang_rt."))) return true; diff --git a/compiler-rt/test/dfsan/custom.cpp b/compiler-rt/test/dfsan/custom.cpp index 56e66fd5069a..2ebeb1e45197 100644 --- a/compiler-rt/test/dfsan/custom.cpp +++ b/compiler-rt/test/dfsan/custom.cpp @@ -1,6 +1,3 @@ -// https://github.com/llvm/llvm-project/issues/60678 -// XFAIL: glibc-2.37 - // RUN: %clang_dfsan %s -o %t && DFSAN_OPTIONS="strict_data_dependencies=0" %run %t // RUN: %clang_dfsan -DSTRICT_DATA_DEPENDENCIES %s -o %t && %run %t // RUN: %clang_dfsan -DORIGIN_TRACKING -mllvm -dfsan-track-origins=1 -mllvm -dfsan-combine-pointer-labels-on-load=false -DSTRICT_DATA_DEPENDENCIES %s -o %t && %run %t diff --git a/compiler-rt/test/dfsan/release_shadow_space.c b/compiler-rt/test/dfsan/release_shadow_space.c index 9492f2ad7728..675640a1c296 100644 --- a/compiler-rt/test/dfsan/release_shadow_space.c +++ b/compiler-rt/test/dfsan/release_shadow_space.c @@ -1,6 +1,3 @@ -// https://github.com/llvm/llvm-project/issues/60678 -// XFAIL: glibc-2.37 - // DFSAN_OPTIONS=no_huge_pages_for_shadow=false RUN: %clang_dfsan %s -o %t && %run %t // DFSAN_OPTIONS=no_huge_pages_for_shadow=true RUN: %clang_dfsan %s -o %t && %run %t // DFSAN_OPTIONS=no_huge_pages_for_shadow=false RUN: %clang_dfsan %s -DORIGIN_TRACKING -mllvm -dfsan-track-origins=1 -o %t && %run %t diff --git a/compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp b/compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp index 1e4b0ed520b8..ca6f637b9a3f 100644 --- a/compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp +++ b/compiler-rt/test/sanitizer_common/TestCases/allocator_returns_null.cpp @@ -34,20 +34,17 @@ // RUN: | FileCheck %s --check-prefix=CHECK-nnCRASH // RUN: %env_tool_opts=allocator_may_return_null=1 %run %t new-nothrow 2>&1 \ // RUN: | FileCheck %s --check-prefix=CHECK-NULL -// RUN: %env_tool_opts=allocator_may_return_null=0 not %run %t vector 2>&1 \ -// RUN: | FileCheck %s --check-prefix=CHECK-vCRASH // TODO(alekseyshl): win32 is disabled due to failing errno tests, fix it there. // UNSUPPORTED: ubsan, target={{.*windows-msvc.*}} #include <assert.h> #include <errno.h> -#include <limits> -#include <new> #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <vector> +#include <limits> +#include <new> int main(int argc, char **argv) { assert(argc == 2); @@ -63,8 +60,6 @@ int main(int argc, char **argv) { (3UL << 30) + 1; #endif - std::vector<char> v; - void *x = nullptr; if (!strcmp(action, "malloc")) { x = malloc(kMaxAllowedMallocSizePlusOne); @@ -87,14 +82,6 @@ int main(int argc, char **argv) { x = operator new(kMaxAllowedMallocSizePlusOne); } else if (!strcmp(action, "new-nothrow")) { x = operator new(kMaxAllowedMallocSizePlusOne, std::nothrow); - } else if (!strcmp(action, "vector")) { -#if __LP64__ || defined(_WIN64) - v.resize(kMaxAllowedMallocSizePlusOne); - x = v.data(); -#else - // Fake it: 32bit fails early in std. - x = malloc(kMaxAllowedMallocSizePlusOne); -#endif } else { assert(0); } @@ -130,8 +117,6 @@ int main(int argc, char **argv) { // CHECK-nnCRASH: new-nothrow: // CHECK-nnCRASH: #{{[0-9]+.*}}allocator_returns_null.cpp // CHECK-nnCRASH: {{SUMMARY: .*Sanitizer: allocation-size-too-big.*allocator_returns_null.cpp.*}} in main -// CHECK-vCRASH: #{{[0-9]+.*}}allocator_returns_null.cpp -// CHECK-vCRASH: {{SUMMARY: .*Sanitizer: allocation-size-too-big.*allocator_returns_null.cpp.*}} in main // CHECK-NULL: {{malloc|calloc|calloc-overflow|realloc|realloc-after-malloc|new-nothrow}} // CHECK-NULL: errno: 12, x: 0 diff --git a/llvm/include/llvm/TargetParser/X86TargetParser.def b/llvm/include/llvm/TargetParser/X86TargetParser.def index b58feafe4e8c..43162f2b52eb 100644 --- a/llvm/include/llvm/TargetParser/X86TargetParser.def +++ b/llvm/include/llvm/TargetParser/X86TargetParser.def @@ -122,6 +122,7 @@ X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "gracemont") // // We cannot just re-sort the list though because its order is dictated by the // order of bits in CodeGenFunction::GetX86CpuSupportsMask. +// We cannot re-adjust the position of X86_FEATURE_COMPAT at the whole list. #ifndef X86_FEATURE_COMPAT #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR) #endif @@ -184,12 +185,12 @@ X86_FEATURE (AMX_TILE, "amx-tile") X86_FEATURE (CLDEMOTE, "cldemote") X86_FEATURE (CLFLUSHOPT, "clflushopt") X86_FEATURE (CLWB, "clwb") +X86_FEATURE_COMPAT(F16C, "f16c", 38) X86_FEATURE (CLZERO, "clzero") X86_FEATURE (CMPXCHG16B, "cx16") X86_FEATURE (CMPXCHG8B, "cx8") X86_FEATURE (CRC32, "crc32") X86_FEATURE (ENQCMD, "enqcmd") -X86_FEATURE (F16C, "f16c") X86_FEATURE (FSGSBASE, "fsgsbase") X86_FEATURE (FXSR, "fxsr") X86_FEATURE (INVPCID, "invpcid") @@ -229,9 +230,9 @@ X86_FEATURE (XSAVE, "xsave") X86_FEATURE (XSAVEC, "xsavec") X86_FEATURE (XSAVEOPT, "xsaveopt") X86_FEATURE (XSAVES, "xsaves") +X86_FEATURE_COMPAT(AVX512FP16, "avx512fp16", 39) X86_FEATURE (HRESET, "hreset") X86_FEATURE (RAOINT, "raoint") -X86_FEATURE (AVX512FP16, "avx512fp16") X86_FEATURE (AMX_FP16, "amx-fp16") X86_FEATURE (CMPCCXADD, "cmpccxadd") X86_FEATURE (AVXNECONVERT, "avxneconvert") diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 0706514828bd..894d028bbd31 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -787,12 +787,9 @@ class bitextract_imm<int bitnum> : SDNodeXForm<imm, [{ return CurDAG->getTargetConstant(Bit, SDLoc(N), MVT::i1); }]>; -def SIMM16bit : ImmLeaf <i32, - [{return isInt<16>(Imm);}] ->; - -def UIMM16bit : ImmLeaf <i32, - [{return isUInt<16>(Imm);}] +def SIMM16bit : TImmLeaf <i32, + [{return isInt<16>(Imm) || isUInt<16>(Imm);}], + as_i16timm >; def i64imm_32bit : ImmLeaf<i64, [{ diff --git a/llvm/lib/Target/AMDGPU/SIModeRegister.cpp b/llvm/lib/Target/AMDGPU/SIModeRegister.cpp index be395d53c34e..e62ad026dc5c 100644 --- a/llvm/lib/Target/AMDGPU/SIModeRegister.cpp +++ b/llvm/lib/Target/AMDGPU/SIModeRegister.cpp @@ -285,7 +285,7 @@ void SIModeRegister::processBlockPhase1(MachineBasicBlock &MBB, 1; unsigned Offset = (Dst & AMDGPU::Hwreg::OFFSET_MASK_) >> AMDGPU::Hwreg::OFFSET_SHIFT_; - unsigned Mask = ((1 << Width) - 1) << Offset; + unsigned Mask = maskTrailingOnes<unsigned>(Width) << Offset; // If an InsertionPoint is set we will insert a setreg there. if (InsertionPoint) { diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td index b78d900c9bbf..d914c3d9032f 100644 --- a/llvm/lib/Target/AMDGPU/SOPInstructions.td +++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td @@ -1124,7 +1124,7 @@ class S_SETREG_B32_Pseudo <list<dag> pattern=[]> : SOPK_Pseudo < pattern>; def S_SETREG_B32 : S_SETREG_B32_Pseudo < - [(int_amdgcn_s_setreg (i32 timm:$simm16), i32:$sdst)]> { + [(int_amdgcn_s_setreg (i32 SIMM16bit:$simm16), i32:$sdst)]> { // Use custom inserter to optimize some cases to // S_DENORM_MODE/S_ROUND_MODE/S_SETREG_B32_mode. let usesCustomInserter = 1; diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp index d46ff07ec734..518fb9d89216 100644 --- a/llvm/lib/TargetParser/X86TargetParser.cpp +++ b/llvm/lib/TargetParser/X86TargetParser.cpp @@ -347,7 +347,7 @@ constexpr ProcInfo Processors[] = { // Tigerlake microarchitecture based processors. { {"tigerlake"}, CK_Tigerlake, FEATURE_AVX512VP2INTERSECT, FeaturesTigerlake, 'l', false }, // Sapphire Rapids microarchitecture based processors. - { {"sapphirerapids"}, CK_SapphireRapids, FEATURE_AVX512BF16, FeaturesSapphireRapids, 'n', false }, + { {"sapphirerapids"}, CK_SapphireRapids, FEATURE_AVX512FP16, FeaturesSapphireRapids, 'n', false }, // Alderlake microarchitecture based processors. { {"alderlake"}, CK_Alderlake, FEATURE_AVX2, FeaturesAlderlake, 'p', false }, // Raptorlake microarchitecture based processors. @@ -369,12 +369,12 @@ constexpr ProcInfo Processors[] = { // Grandridge microarchitecture based processors. { {"grandridge"}, CK_Grandridge, FEATURE_AVX2, FeaturesSierraforest, 'p', false }, // Granite Rapids microarchitecture based processors. - { {"graniterapids"}, CK_Graniterapids, FEATURE_AVX512BF16, FeaturesGraniteRapids, 'n', false }, + { {"graniterapids"}, CK_Graniterapids, FEATURE_AVX512FP16, FeaturesGraniteRapids, 'n', false }, // Granite Rapids D microarchitecture based processors. - { {"graniterapids-d"}, CK_GraniterapidsD, FEATURE_AVX512BF16, FeaturesGraniteRapids | FeatureAMX_COMPLEX, '\0', false }, - { {"graniterapids_d"}, CK_GraniterapidsD, FEATURE_AVX512BF16, FeaturesGraniteRapids | FeatureAMX_COMPLEX, 'n', true }, + { {"graniterapids-d"}, CK_GraniterapidsD, FEATURE_AVX512FP16, FeaturesGraniteRapids | FeatureAMX_COMPLEX, '\0', false }, + { {"graniterapids_d"}, CK_GraniterapidsD, FEATURE_AVX512FP16, FeaturesGraniteRapids | FeatureAMX_COMPLEX, 'n', true }, // Emerald Rapids microarchitecture based processors. - { {"emeraldrapids"}, CK_Emeraldrapids, FEATURE_AVX512BF16, FeaturesSapphireRapids, 'n', false }, + { {"emeraldrapids"}, CK_Emeraldrapids, FEATURE_AVX512FP16, FeaturesSapphireRapids, 'n', false }, // Clearwaterforest microarchitecture based processors. { {"clearwaterforest"}, CK_Lunarlake, FEATURE_AVX2, FeaturesClearwaterforest, 'p', false }, // Knights Landing processor. diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll index a2b7e9de70e8..05186ac2aa28 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll @@ -1433,6 +1433,72 @@ define amdgpu_kernel void @test_setreg_set_4_bits_straddles_round_and_denorm() { ret void } +define amdgpu_ps void @test_63489(i32 inreg %var.mode) { +; GFX6-LABEL: test_63489: +; GFX6: ; %bb.0: +; GFX6-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x80,0xb9] +; GFX6-NEXT: ;;#ASMSTART +; GFX6-NEXT: ;;#ASMEND +; GFX6-NEXT: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] +; +; GFX789-LABEL: test_63489: +; GFX789: ; %bb.0: +; GFX789-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x00,0xb9] +; GFX789-NEXT: ;;#ASMSTART +; GFX789-NEXT: ;;#ASMEND +; GFX789-NEXT: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] +; +; GFX10-LABEL: test_63489: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x80,0xb9] +; GFX10-NEXT: ;;#ASMSTART +; GFX10-NEXT: ;;#ASMEND +; GFX10-NEXT: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] +; +; GFX11-LABEL: test_63489: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x00,0xb9] +; GFX11-NEXT: ;;#ASMSTART +; GFX11-NEXT: ;;#ASMEND +; GFX11-NEXT: s_endpgm ; encoding: [0x00,0x00,0xb0,0xbf] + call void @llvm.amdgcn.s.setreg(i32 63489, i32 %var.mode) + call void asm sideeffect "", ""() + ret void +} + +define amdgpu_ps void @test_minus_2047(i32 inreg %var.mode) { +; GFX6-LABEL: test_minus_2047: +; GFX6: ; %bb.0: +; GFX6-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x80,0xb9] +; GFX6-NEXT: ;;#ASMSTART +; GFX6-NEXT: ;;#ASMEND +; GFX6-NEXT: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] +; +; GFX789-LABEL: test_minus_2047: +; GFX789: ; %bb.0: +; GFX789-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x00,0xb9] +; GFX789-NEXT: ;;#ASMSTART +; GFX789-NEXT: ;;#ASMEND +; GFX789-NEXT: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] +; +; GFX10-LABEL: test_minus_2047: +; GFX10: ; %bb.0: +; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x80,0xb9] +; GFX10-NEXT: ;;#ASMSTART +; GFX10-NEXT: ;;#ASMEND +; GFX10-NEXT: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] +; +; GFX11-LABEL: test_minus_2047: +; GFX11: ; %bb.0: +; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE), s0 ; encoding: [0x01,0xf8,0x00,0xb9] +; GFX11-NEXT: ;;#ASMSTART +; GFX11-NEXT: ;;#ASMEND +; GFX11-NEXT: s_endpgm ; encoding: [0x00,0x00,0xb0,0xbf] + call void @llvm.amdgcn.s.setreg(i32 -2047, i32 %var.mode) + call void asm sideeffect "", ""() + ret void +} + ; FIXME: Broken for DAG ; define void @test_setreg_roundingmode_var_vgpr(i32 %var.mode) { ; call void @llvm.amdgcn.s.setreg(i32 4097, i32 %var.mode) diff --git a/llvm/test/CodeGen/X86/apx/adc.ll b/llvm/test/CodeGen/X86/apx/adc.ll index af9458e1b01f..e8657acea8ad 100644 --- a/llvm/test/CodeGen/X86/apx/adc.ll +++ b/llvm/test/CodeGen/X86/apx/adc.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: adc8rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: adcb %sil, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: adcb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i8 %a, %b %k = icmp ugt i8 %x, %y %z = zext i1 %k to i8 @@ -17,9 +17,9 @@ define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind { define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: adcw %si, %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: adcw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i16 %a, %b %k = icmp ugt i16 %x, %y %z = zext i1 %k to i16 @@ -30,9 +30,9 @@ define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind { define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: adcl %esi, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: adcl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i32 %a, %b %k = icmp ugt i32 %x, %y %z = zext i1 %k to i32 @@ -43,9 +43,9 @@ define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: adcq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: adcq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i64 %a, %b %k = icmp ugt i64 %x, %y %z = zext i1 %k to i64 @@ -56,9 +56,9 @@ define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind { define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: adc8rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: adcb (%rsi), %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: adcb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x12,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i8, ptr %ptr %s = add i8 %a, %b %k = icmp ugt i8 %x, %y @@ -70,9 +70,9 @@ define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: adcw (%rsi), %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: adcw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x13,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i16, ptr %ptr %s = add i16 %a, %b %k = icmp ugt i16 %x, %y @@ -84,9 +84,9 @@ define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: adcl (%rsi), %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: adcl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x13,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i32, ptr %ptr %s = add i32 %a, %b %k = icmp ugt i32 %x, %y @@ -98,9 +98,9 @@ define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: adcq (%rsi), %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: adcq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x13,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i64, ptr %ptr %s = add i64 %a, %b %k = icmp ugt i64 %x, %y @@ -112,11 +112,11 @@ define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: adcw $0, %di, %ax -; CHECK-NEXT: addl $123, %eax +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00] +; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i16 %a, 123 %k = icmp ugt i16 %x, %y %z = zext i1 %k to i16 @@ -127,9 +127,9 @@ define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind { define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: adcl $123, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i32 %a, 123 %k = icmp ugt i32 %x, %y %z = zext i1 %k to i32 @@ -140,9 +140,9 @@ define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind { define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: adcq $123, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i64 %a, 123 %k = icmp ugt i64 %x, %y %z = zext i1 %k to i64 @@ -153,9 +153,9 @@ define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind { define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: adc8ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %sil, %dl, %al -; CHECK-NEXT: adcb $123, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2] +; CHECK-NEXT: adcb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xd7,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i8 %a, 123 %k = icmp ugt i8 %x, %y %z = zext i1 %k to i8 @@ -166,11 +166,12 @@ define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind { define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: adcw $0, %di, %ax -; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2 +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00] +; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i16 %a, 1234 %k = icmp ugt i16 %x, %y %z = zext i1 %k to i16 @@ -181,9 +182,10 @@ define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind { define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: adcl $123456, %edi, %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: adcl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i32 %a, 123456 %k = icmp ugt i32 %x, %y %z = zext i1 %k to i32 @@ -194,9 +196,10 @@ define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind { define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: adcq $123456, %rdi, %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: adcq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] %s = add i64 %a, 123456 %k = icmp ugt i64 %x, %y %z = zext i1 %k to i64 @@ -207,9 +210,9 @@ define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind { define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: adc8mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: adcb %dil, (%rsi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: adcb %dil, (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i8, ptr %ptr %s = add i8 %b, %a %k = icmp ugt i8 %x, %y @@ -221,9 +224,9 @@ define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: adcw %di, (%rsi), %ax -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: adcw %di, (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i16, ptr %ptr %s = add i16 %b, %a %k = icmp ugt i16 %x, %y @@ -235,9 +238,9 @@ define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: adcl %edi, (%rsi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: adcl %edi, (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i32, ptr %ptr %s = add i32 %b, %a %k = icmp ugt i32 %x, %y @@ -249,9 +252,9 @@ define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: adcq %rdi, (%rsi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: adcq %rdi, (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i64, ptr %ptr %s = add i64 %b, %a %k = icmp ugt i64 %x, %y @@ -263,11 +266,11 @@ define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16mi8: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: adcw $0, (%rdi), %ax -; CHECK-NEXT: addl $123, %eax +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00] +; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %s = add i16 %a, 123 %k = icmp ugt i16 %x, %y @@ -279,9 +282,9 @@ define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32mi8: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: adcl $123, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %s = add i32 %a, 123 %k = icmp ugt i32 %x, %y @@ -293,9 +296,9 @@ define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64mi8: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: adcq $123, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %s = add i64 %a, 123 %k = icmp ugt i64 %x, %y @@ -307,9 +310,9 @@ define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind { define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: adc8mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %sil, %dl, %al -; CHECK-NEXT: adcb $123, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2] +; CHECK-NEXT: adcb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x17,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i8, ptr %ptr %s = add i8 %a, 123 %k = icmp ugt i8 %x, %y @@ -321,11 +324,12 @@ define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind { define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: adcw $0, (%rdi), %ax -; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2 +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00] +; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %s = add i16 %a, 1234 %k = icmp ugt i16 %x, %y @@ -337,9 +341,10 @@ define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: adcl $123456, (%rdi), %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: adcl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %s = add i32 %a, 123456 %k = icmp ugt i32 %x, %y @@ -351,9 +356,10 @@ define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: adcq $123456, (%rdi), %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: adcq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %s = add i64 %a, 123456 %k = icmp ugt i64 %x, %y @@ -365,9 +371,9 @@ define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind { define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: adc8mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: adcb %dil, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: adcb %dil, (%rsi) # encoding: [0x40,0x10,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i8, ptr %ptr %s = add i8 %b, %a %k = icmp ugt i8 %x, %y @@ -380,9 +386,9 @@ define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: adcw %di, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: adcw %di, (%rsi) # encoding: [0x66,0x11,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i16, ptr %ptr %s = add i16 %b, %a %k = icmp ugt i16 %x, %y @@ -395,9 +401,9 @@ define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: adcl %edi, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: adcl %edi, (%rsi) # encoding: [0x11,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i32, ptr %ptr %s = add i32 %b, %a %k = icmp ugt i32 %x, %y @@ -410,9 +416,9 @@ define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: adcq %rdi, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: adcq %rdi, (%rsi) # encoding: [0x48,0x11,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i64, ptr %ptr %s = add i64 %b, %a %k = icmp ugt i64 %x, %y @@ -425,9 +431,9 @@ define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: adc8mi_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %sil, %dl, %al -; CHECK-NEXT: adcb $123, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2] +; CHECK-NEXT: adcb $123, (%rdi) # encoding: [0x80,0x17,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i8, ptr %ptr %s = add i8 %a, 123 %k = icmp ugt i8 %x, %y @@ -440,11 +446,12 @@ define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind { define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: adc16mi_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: adcw $0, (%rdi), %ax -; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2 -; CHECK-NEXT: movw %ax, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00] +; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 +; CHECK-NEXT: movw %ax, (%rdi) # encoding: [0x66,0x89,0x07] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %s = add i16 %a, 1234 %k = icmp ugt i16 %x, %y @@ -457,9 +464,10 @@ define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind { define void @adc32mi_legacy(ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: adc32mi_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: adcl $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: adcl $123456, (%rdi) # encoding: [0x81,0x17,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %s = add i32 %a, 123456 %k = icmp ugt i32 %x, %y @@ -472,9 +480,10 @@ define void @adc32mi_legacy(ptr %ptr, i32 %x, i32 %y) nounwind { define void @adc64mi_legacy(ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: adc64mi_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: adcq $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: adcq $123456, (%rdi) # encoding: [0x48,0x81,0x17,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %s = add i64 %a, 123456 %k = icmp ugt i64 %x, %y diff --git a/llvm/test/CodeGen/X86/apx/add.ll b/llvm/test/CodeGen/X86/apx/add.ll index 971ba80eb6c6..a42f872b93e1 100644 --- a/llvm/test/CodeGen/X86/apx/add.ll +++ b/llvm/test/CodeGen/X86/apx/add.ll @@ -1,11 +1,11 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s define i8 @add8rr(i8 noundef %a, i8 noundef %b) { ; CHECK-LABEL: add8rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb %sil, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: addb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i8 %a, %b ret i8 %add @@ -14,9 +14,9 @@ entry: define i16 @add16rr(i16 noundef %a, i16 noundef %b) { ; CHECK-LABEL: add16rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl %esi, %edi, %eax +; CHECK-NEXT: addl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xf7] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i16 %a, %b ret i16 %add @@ -25,8 +25,8 @@ entry: define i32 @add32rr(i32 noundef %a, i32 noundef %b) { ; CHECK-LABEL: add32rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl %esi, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i32 %a, %b ret i32 %add @@ -35,8 +35,8 @@ entry: define i64 @add64rr(i64 noundef %a, i64 noundef %b) { ; CHECK-LABEL: add64rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x01,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i64 %a, %b ret i64 %add @@ -45,8 +45,8 @@ entry: define i8 @add8rm(i8 noundef %a, ptr %ptr) { ; CHECK-LABEL: add8rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb (%rsi), %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: addb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x02,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i8, ptr %ptr %add = add i8 %a, %b @@ -56,8 +56,8 @@ entry: define i16 @add16rm(i16 noundef %a, ptr %ptr) { ; CHECK-LABEL: add16rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw (%rsi), %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: addw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x03,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i16, ptr %ptr %add = add i16 %a, %b @@ -67,8 +67,8 @@ entry: define i32 @add32rm(i32 noundef %a, ptr %ptr) { ; CHECK-LABEL: add32rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl (%rsi), %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x03,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i32, ptr %ptr %add = add i32 %a, %b @@ -78,8 +78,8 @@ entry: define i64 @add64rm(i64 noundef %a, ptr %ptr) { ; CHECK-LABEL: add64rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq (%rsi), %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x03,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i64, ptr %ptr %add = add i64 %a, %b @@ -89,9 +89,9 @@ entry: define i16 @add16ri8(i16 noundef %a) { ; CHECK-LABEL: add16ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123, %edi, %eax +; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i16 %a, 123 ret i16 %add @@ -100,8 +100,8 @@ entry: define i32 @add32ri8(i32 noundef %a) { ; CHECK-LABEL: add32ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i32 %a, 123 ret i32 %add @@ -110,8 +110,8 @@ entry: define i64 @add64ri8(i64 noundef %a) { ; CHECK-LABEL: add64ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $123, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i64 %a, 123 ret i64 %add @@ -120,8 +120,8 @@ entry: define i8 @add8ri(i8 noundef %a) { ; CHECK-LABEL: add8ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb $123, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: addb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xc7,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i8 %a, 123 ret i8 %add @@ -130,9 +130,10 @@ entry: define i16 @add16ri(i16 noundef %a) { ; CHECK-LABEL: add16ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $1234, %edi, %eax # imm = 0x4D2 +; CHECK-NEXT: addl $1234, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i16 %a, 1234 ret i16 %add @@ -141,8 +142,9 @@ entry: define i32 @add32ri(i32 noundef %a) { ; CHECK-LABEL: add32ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123456, %edi, %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: addl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i32 %a, 123456 ret i32 %add @@ -151,8 +153,9 @@ entry: define i64 @add64ri(i64 noundef %a) { ; CHECK-LABEL: add64ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $123456, %rdi, %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: addq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = add i64 %a, 123456 ret i64 %add @@ -161,8 +164,8 @@ entry: define i8 @add8mr(ptr %a, i8 noundef %b) { ; CHECK-LABEL: add8mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb %sil, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: addb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %add = add nsw i8 %t, %b @@ -172,8 +175,8 @@ entry: define i16 @add16mr(ptr %a, i16 noundef %b) { ; CHECK-LABEL: add16mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw %si, (%rdi), %ax -; CHECK-NEXT: retq +; CHECK-NEXT: addw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x01,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %add = add nsw i16 %t, %b @@ -183,8 +186,8 @@ entry: define i32 @add32mr(ptr %a, i32 noundef %b) { ; CHECK-LABEL: add32mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl %esi, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %add = add nsw i32 %t, %b @@ -194,8 +197,8 @@ entry: define i64 @add64mr(ptr %a, i64 noundef %b) { ; CHECK-LABEL: add64mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq %rsi, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x01,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %add = add nsw i64 %t, %b @@ -205,10 +208,10 @@ entry: define i16 @add16mi8(ptr %a) { ; CHECK-LABEL: add16mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: addl $123, %eax +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %add = add nsw i16 %t, 123 @@ -218,8 +221,8 @@ entry: define i32 @add32mi8(ptr %a) { ; CHECK-LABEL: add32mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %add = add nsw i32 %t, 123 @@ -229,8 +232,8 @@ entry: define i64 @add64mi8(ptr %a) { ; CHECK-LABEL: add64mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $123, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %add = add nsw i64 %t, 123 @@ -240,8 +243,8 @@ entry: define i8 @add8mi(ptr %a) { ; CHECK-LABEL: add8mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb $123, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: addb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x07,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %add = add nsw i8 %t, 123 @@ -251,10 +254,11 @@ entry: define i16 @add16mi(ptr %a) { ; CHECK-LABEL: add16mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: addl $1234, %eax # imm = 0x4D2 +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %add = add nsw i16 %t, 1234 @@ -264,8 +268,9 @@ entry: define i32 @add32mi(ptr %a) { ; CHECK-LABEL: add32mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123456, (%rdi), %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: addl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %add = add nsw i32 %t, 123456 @@ -275,8 +280,9 @@ entry: define i64 @add64mi(ptr %a) { ; CHECK-LABEL: add64mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $123456, (%rdi), %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: addq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %add = add nsw i64 %t, 123456 @@ -291,12 +297,12 @@ declare i64 @llvm.uadd.sat.i64(i64, i64) define i8 @addflag8rr(i8 noundef %a, i8 noundef %b) { ; CHECK-LABEL: addflag8rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb %sil, %dil, %al -; CHECK-NEXT: movzbl %al, %ecx -; CHECK-NEXT: movl $255, %eax -; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: addb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0xf7] +; CHECK-NEXT: movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8] +; CHECK-NEXT: movl $255, %eax # encoding: [0xb8,0xff,0x00,0x00,0x00] +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i8 @llvm.uadd.sat.i8(i8 %a, i8 %b) ret i8 %add @@ -305,11 +311,12 @@ entry: define i16 @addflag16rr(i16 noundef %a, i16 noundef %b) { ; CHECK-LABEL: addflag16rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw %si, %di, %cx -; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF -; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: addw %si, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x01,0xf7] +; CHECK-NEXT: movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00] +; CHECK-NEXT: # imm = 0xFFFF +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 %b) ret i16 %add @@ -318,10 +325,10 @@ entry: define i32 @addflag32rr(i32 noundef %a, i32 noundef %b) { ; CHECK-LABEL: addflag32rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl %esi, %edi, %ecx -; CHECK-NEXT: movl $-1, %eax -; CHECK-NEXT: cmovael %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x01,0xf7] +; CHECK-NEXT: movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 %b) ret i32 %add @@ -330,10 +337,10 @@ entry: define i64 @addflag64rr(i64 noundef %a, i64 noundef %b) { ; CHECK-LABEL: addflag64rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq %rsi, %rdi, %rcx -; CHECK-NEXT: movq $-1, %rax -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x01,0xf7] +; CHECK-NEXT: movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 %b) ret i64 %add @@ -342,12 +349,12 @@ entry: define i8 @addflag8rm(i8 noundef %a, ptr %b) { ; CHECK-LABEL: addflag8rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb (%rsi), %dil, %al -; CHECK-NEXT: movzbl %al, %ecx -; CHECK-NEXT: movl $255, %eax -; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: addb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x02,0x3e] +; CHECK-NEXT: movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8] +; CHECK-NEXT: movl $255, %eax # encoding: [0xb8,0xff,0x00,0x00,0x00] +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i8, ptr %b %add = call i8 @llvm.uadd.sat.i8(i8 %a, i8 %t) @@ -357,11 +364,12 @@ entry: define i16 @addflag16rm(i16 noundef %a, ptr %b) { ; CHECK-LABEL: addflag16rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw (%rsi), %di, %cx -; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF -; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: addw (%rsi), %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x03,0x3e] +; CHECK-NEXT: movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00] +; CHECK-NEXT: # imm = 0xFFFF +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i16, ptr %b %add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 %t) @@ -371,10 +379,10 @@ entry: define i32 @addflag32rm(i32 noundef %a, ptr %b) { ; CHECK-LABEL: addflag32rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl (%rsi), %edi, %ecx -; CHECK-NEXT: movl $-1, %eax -; CHECK-NEXT: cmovael %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl (%rsi), %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x03,0x3e] +; CHECK-NEXT: movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i32, ptr %b %add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 %t) @@ -384,10 +392,10 @@ entry: define i64 @addflag64rm(i64 noundef %a, ptr %b) { ; CHECK-LABEL: addflag64rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq (%rsi), %rdi, %rcx -; CHECK-NEXT: movq $-1, %rax -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq (%rsi), %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x03,0x3e] +; CHECK-NEXT: movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i64, ptr %b %add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 %t) @@ -397,11 +405,12 @@ entry: define i16 @addflag16ri8(i16 noundef %a) { ; CHECK-LABEL: addflag16ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw $123, %di, %cx -; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF -; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: addw $123, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xc7,0x7b,0x00] +; CHECK-NEXT: movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00] +; CHECK-NEXT: # imm = 0xFFFF +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 123) ret i16 %add @@ -410,10 +419,10 @@ entry: define i32 @addflag32ri8(i32 noundef %a) { ; CHECK-LABEL: addflag32ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123, %edi, %ecx -; CHECK-NEXT: movl $-1, %eax -; CHECK-NEXT: cmovael %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 123) ret i32 %add @@ -422,10 +431,10 @@ entry: define i64 @addflag64ri8(i64 noundef %a) { ; CHECK-LABEL: addflag64ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $123, %rdi, %rcx -; CHECK-NEXT: movq $-1, %rax -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 123) ret i64 %add @@ -434,12 +443,12 @@ entry: define i8 @addflag8ri(i8 noundef %a) { ; CHECK-LABEL: addflag8ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb $123, %dil, %al -; CHECK-NEXT: movzbl %al, %ecx -; CHECK-NEXT: movl $255, %eax -; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: addb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xc7,0x7b] +; CHECK-NEXT: movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8] +; CHECK-NEXT: movl $255, %eax # encoding: [0xb8,0xff,0x00,0x00,0x00] +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i8 @llvm.uadd.sat.i8(i8 %a, i8 123) ret i8 %add @@ -448,11 +457,13 @@ entry: define i16 @addflag16ri(i16 noundef %a) { ; CHECK-LABEL: addflag16ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw $1234, %di, %cx # imm = 0x4D2 -; CHECK-NEXT: movl $65535, %eax # imm = 0xFFFF -; CHECK-NEXT: cmovael %ecx, %eax +; CHECK-NEXT: addw $1234, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xc7,0xd2,0x04] +; CHECK-NEXT: # imm = 0x4D2 +; CHECK-NEXT: movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00] +; CHECK-NEXT: # imm = 0xFFFF +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i16 @llvm.uadd.sat.i16(i16 %a, i16 1234) ret i16 %add @@ -461,10 +472,11 @@ entry: define i32 @addflag32ri(i32 noundef %a) { ; CHECK-LABEL: addflag32ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123456, %edi, %ecx # imm = 0x1E240 -; CHECK-NEXT: movl $-1, %eax -; CHECK-NEXT: cmovael %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 123456) ret i32 %add @@ -473,10 +485,11 @@ entry: define i64 @addflag64ri(i64 noundef %a) { ; CHECK-LABEL: addflag64ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $123456, %rdi, %rcx # imm = 0x1E240 -; CHECK-NEXT: movq $-1, %rax -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff] +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 123456) ret i64 %add @@ -488,11 +501,12 @@ define i1 @add64ri_reloc(i16 %k) { ; CHECK-LABEL: add64ri_reloc: ; CHECK: # %bb.0: ; CHECK-NEXT: # kill: def $edi killed $edi def $rdi -; CHECK-NEXT: movswq %di, %rax -; CHECK-NEXT: addq %rax, %rax -; CHECK-NEXT: addq $val, %rax -; CHECK-NEXT: setne %al -; CHECK-NEXT: retq +; CHECK-NEXT: movswq %di, %rax # encoding: [0x48,0x0f,0xbf,0xc7] +; CHECK-NEXT: addq %rax, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x01,0xc0] +; CHECK-NEXT: addq $val, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: val, kind: reloc_signed_4byte +; CHECK-NEXT: setne %al # encoding: [0x0f,0x95,0xc0] +; CHECK-NEXT: retq # encoding: [0xc3] %g = getelementptr inbounds i16, ptr @val, i16 %k %cmp = icmp ne ptr %g, null ret i1 %cmp @@ -501,8 +515,8 @@ define i1 @add64ri_reloc(i16 %k) { define void @add8mr_legacy(ptr %a, i8 noundef %b) { ; CHECK-LABEL: add8mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb %sil, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: addb %sil, (%rdi) # encoding: [0x40,0x00,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %add = add i8 %t, %b @@ -513,8 +527,8 @@ entry: define void @add16mr_legacy(ptr %a, i16 noundef %b) { ; CHECK-LABEL: add16mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw %si, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: addw %si, (%rdi) # encoding: [0x66,0x01,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %add = add i16 %t, %b @@ -525,8 +539,8 @@ entry: define void @add32mr_legacy(ptr %a, i32 noundef %b) { ; CHECK-LABEL: add32mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl %esi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: addl %esi, (%rdi) # encoding: [0x01,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %add = add i32 %t, %b @@ -537,8 +551,8 @@ entry: define void @add64mr_legacy(ptr %a, i64 noundef %b) { ; CHECK-LABEL: add64mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq %rsi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: addq %rsi, (%rdi) # encoding: [0x48,0x01,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %add = add i64 %t, %b @@ -549,8 +563,8 @@ entry: define void @add8mi_legacy(ptr %a) { ; CHECK-LABEL: add8mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb $123, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: addb $123, (%rdi) # encoding: [0x80,0x07,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %add = add nsw i8 %t, 123 @@ -561,8 +575,9 @@ entry: define void @add16mi_legacy(ptr %a) { ; CHECK-LABEL: add16mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw $1234, (%rdi) # imm = 0x4D2 -; CHECK-NEXT: retq +; CHECK-NEXT: addw $1234, (%rdi) # encoding: [0x66,0x81,0x07,0xd2,0x04] +; CHECK-NEXT: # imm = 0x4D2 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %add = add nsw i16 %t, 1234 @@ -573,8 +588,9 @@ entry: define void @add32mi_legacy(ptr %a) { ; CHECK-LABEL: add32mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: addl $123456, (%rdi) # encoding: [0x81,0x07,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %add = add nsw i32 %t, 123456 @@ -585,8 +601,9 @@ entry: define void @add64mi_legacy(ptr %a) { ; CHECK-LABEL: add64mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: addq $123456, (%rdi) # encoding: [0x48,0x81,0x07,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %add = add nsw i64 %t, 123456 diff --git a/llvm/test/CodeGen/X86/apx/and.ll b/llvm/test/CodeGen/X86/apx/and.ll index 1f7b694e6c67..b7c1a851c07d 100644 --- a/llvm/test/CodeGen/X86/apx/and.ll +++ b/llvm/test/CodeGen/X86/apx/and.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s define i8 @and8rr(i8 noundef %a, i8 noundef %b) { ; CHECK-LABEL: and8rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl %esi, %edi, %eax +; CHECK-NEXT: andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i8 %a, %b ret i8 %and @@ -15,9 +15,9 @@ entry: define i16 @and16rr(i16 noundef %a, i16 noundef %b) { ; CHECK-LABEL: and16rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl %esi, %edi, %eax +; CHECK-NEXT: andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i16 %a, %b ret i16 %and @@ -26,8 +26,8 @@ entry: define i32 @and32rr(i32 noundef %a, i32 noundef %b) { ; CHECK-LABEL: and32rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl %esi, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i32 %a, %b ret i32 %and @@ -36,8 +36,8 @@ entry: define i64 @and64rr(i64 noundef %a, i64 noundef %b) { ; CHECK-LABEL: and64rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: andq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x21,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i64 %a, %b ret i64 %and @@ -46,8 +46,8 @@ entry: define i8 @and8rm(i8 noundef %a, ptr %b) { ; CHECK-LABEL: and8rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andb (%rsi), %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: andb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x22,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i8, ptr %b %and = and i8 %a, %t @@ -57,8 +57,8 @@ entry: define i16 @and16rm(i16 noundef %a, ptr %b) { ; CHECK-LABEL: and16rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andw (%rsi), %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: andw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x23,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i16, ptr %b %and = and i16 %a, %t @@ -68,8 +68,8 @@ entry: define i32 @and32rm(i32 noundef %a, ptr %b) { ; CHECK-LABEL: and32rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl (%rsi), %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: andl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x23,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i32, ptr %b %and = and i32 %a, %t @@ -79,8 +79,8 @@ entry: define i64 @and64rm(i64 noundef %a, ptr %b) { ; CHECK-LABEL: and64rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andq (%rsi), %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: andq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x23,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i64, ptr %b %and = and i64 %a, %t @@ -90,9 +90,9 @@ entry: define i16 @and16ri8(i16 noundef %a) { ; CHECK-LABEL: and16ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123, %edi, %eax +; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i16 %a, 123 ret i16 %and @@ -101,8 +101,8 @@ entry: define i32 @and32ri8(i32 noundef %a) { ; CHECK-LABEL: and32ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i32 %a, 123 ret i32 %and @@ -111,8 +111,8 @@ entry: define i64 @and64ri8(i64 noundef %a) { ; CHECK-LABEL: and64ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i64 %a, 123 ret i64 %and @@ -121,8 +121,8 @@ entry: define i8 @and8ri(i8 noundef %a) { ; CHECK-LABEL: and8ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andb $123, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: andb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xe7,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i8 %a, 123 ret i8 %and @@ -131,9 +131,10 @@ entry: define i16 @and16ri(i16 noundef %a) { ; CHECK-LABEL: and16ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $1234, %edi, %eax # imm = 0x4D2 +; CHECK-NEXT: andl $1234, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i16 %a, 1234 ret i16 %and @@ -142,8 +143,9 @@ entry: define i32 @and32ri(i32 noundef %a) { ; CHECK-LABEL: and32ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123456, %edi, %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i32 %a, 123456 ret i32 %and @@ -152,8 +154,9 @@ entry: define i64 @and64ri(i64 noundef %a) { ; CHECK-LABEL: and64ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123456, %edi, %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %and = and i64 %a, 123456 ret i64 %and @@ -162,8 +165,8 @@ entry: define i8 @and8mr(ptr %a, i8 noundef %b) { ; CHECK-LABEL: and8mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andb %sil, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: andb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x20,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %and = and i8 %t, %b @@ -173,8 +176,8 @@ entry: define i16 @and16mr(ptr %a, i16 noundef %b) { ; CHECK-LABEL: and16mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andw %si, (%rdi), %ax -; CHECK-NEXT: retq +; CHECK-NEXT: andw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x21,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %and = and i16 %t, %b @@ -184,8 +187,8 @@ entry: define i32 @and32mr(ptr %a, i32 noundef %b) { ; CHECK-LABEL: and32mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl %esi, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: andl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %and = and i32 %t, %b @@ -195,8 +198,8 @@ entry: define i64 @and64mr(ptr %a, i64 noundef %b) { ; CHECK-LABEL: and64mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andq %rsi, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: andq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x21,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %and = and i64 %t, %b @@ -206,10 +209,10 @@ entry: define i16 @and16mi8(ptr %a) { ; CHECK-LABEL: and16mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: andl $123, %eax +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %and = and i16 %t, 123 @@ -219,8 +222,8 @@ entry: define i32 @and32mi8(ptr %a) { ; CHECK-LABEL: and32mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x27,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %and = and i32 %t, 123 @@ -230,9 +233,9 @@ entry: define i64 @and64mi8(ptr %a) { ; CHECK-LABEL: and64mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movq (%rdi), %rax -; CHECK-NEXT: andl $123, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07] +; CHECK-NEXT: andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %and = and i64 %t, 123 @@ -242,8 +245,8 @@ entry: define i8 @and8mi(ptr %a) { ; CHECK-LABEL: and8mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andb $123, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: andb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x27,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %and = and i8 %t, 123 @@ -253,10 +256,11 @@ entry: define i16 @and16mi(ptr %a) { ; CHECK-LABEL: and16mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: andl $1234, %eax # imm = 0x4D2 +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: andl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x25,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %and = and i16 %t, 1234 @@ -266,8 +270,9 @@ entry: define i32 @and32mi(ptr %a) { ; CHECK-LABEL: and32mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123456, (%rdi), %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x27,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %and = and i32 %t, 123456 @@ -277,9 +282,10 @@ entry: define i64 @and64mi(ptr %a) { ; CHECK-LABEL: and64mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movq (%rdi), %rax -; CHECK-NEXT: andl $123456, %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: movq (%rdi), %rax # encoding: [0x48,0x8b,0x07] +; CHECK-NEXT: andl $123456, %eax # EVEX TO LEGACY Compression encoding: [0x25,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %and = and i64 %t, 123456 @@ -291,11 +297,12 @@ entry: define i1 @andflag8rr(i8 %a, i8 %b) { ; CHECK-LABEL: andflag8rr: ; CHECK: # %bb.0: -; CHECK-NEXT: notb %sil, %al -; CHECK-NEXT: andb %al, %dil, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6] +; CHECK-NEXT: andb %al, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x20,0xc7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i8 %b, -1 %v0 = and i8 %a, %xor ; 0xff << 50 %v1 = icmp eq i8 %v0, 0 @@ -306,11 +313,12 @@ define i1 @andflag8rr(i8 %a, i8 %b) { define i1 @andflag16rr(i16 %a, i16 %b) { ; CHECK-LABEL: andflag16rr: ; CHECK: # %bb.0: -; CHECK-NEXT: notl %esi, %eax -; CHECK-NEXT: andw %ax, %di, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6] +; CHECK-NEXT: andw %ax, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x21,0xc7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 %b, -1 %v0 = and i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -321,10 +329,11 @@ define i1 @andflag16rr(i16 %a, i16 %b) { define i1 @andflag32rr(i32 %a, i32 %b) { ; CHECK-LABEL: andflag32rr: ; CHECK: # %bb.0: -; CHECK-NEXT: andl %esi, %edi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x21,0xf7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = and i32 %a, %b ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -334,10 +343,11 @@ define i1 @andflag32rr(i32 %a, i32 %b) { define i1 @andflag64rr(i64 %a, i64 %b) { ; CHECK-LABEL: andflag64rr: ; CHECK: # %bb.0: -; CHECK-NEXT: andq %rsi, %rdi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x21,0xf7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = and i64 %a, %b ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -347,11 +357,12 @@ define i1 @andflag64rr(i64 %a, i64 %b) { define i1 @andflag8rm(ptr %ptr, i8 %b) { ; CHECK-LABEL: andflag8rm: ; CHECK: # %bb.0: -; CHECK-NEXT: notb %sil, %al -; CHECK-NEXT: andb (%rdi), %al, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6] +; CHECK-NEXT: andb (%rdi), %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x22,0x07] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i8, ptr %ptr %xor = xor i8 %b, -1 %v0 = and i8 %a, %xor ; 0xff << 50 @@ -363,11 +374,12 @@ define i1 @andflag8rm(ptr %ptr, i8 %b) { define i1 @andflag16rm(ptr %ptr, i16 %b) { ; CHECK-LABEL: andflag16rm: ; CHECK: # %bb.0: -; CHECK-NEXT: notl %esi, %eax -; CHECK-NEXT: andw (%rdi), %ax, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6] +; CHECK-NEXT: andw (%rdi), %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x23,0x07] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %xor = xor i16 %b, -1 %v0 = and i16 %a, %xor ; 0xff << 50 @@ -379,10 +391,11 @@ define i1 @andflag16rm(ptr %ptr, i16 %b) { define i1 @andflag32rm(ptr %ptr, i32 %b) { ; CHECK-LABEL: andflag32rm: ; CHECK: # %bb.0: -; CHECK-NEXT: andl (%rdi), %esi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andl (%rdi), %esi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x23,0x37] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %v0 = and i32 %a, %b ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 @@ -393,10 +406,11 @@ define i1 @andflag32rm(ptr %ptr, i32 %b) { define i1 @andflag64rm(ptr %ptr, i64 %b) { ; CHECK-LABEL: andflag64rm: ; CHECK: # %bb.0: -; CHECK-NEXT: andq (%rdi), %rsi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andq (%rdi), %rsi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x23,0x37] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %v0 = and i64 %a, %b ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 @@ -407,10 +421,11 @@ define i1 @andflag64rm(ptr %ptr, i64 %b) { define i1 @andflag8ri(i8 %a) { ; CHECK-LABEL: andflag8ri: ; CHECK: # %bb.0: -; CHECK-NEXT: andb $-124, %dil, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xe7,0x84] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i8 123, -1 %v0 = and i8 %a, %xor ; 0xff << 50 %v1 = icmp eq i8 %v0, 0 @@ -421,10 +436,12 @@ define i1 @andflag8ri(i8 %a) { define i1 @andflag16ri(i16 %a) { ; CHECK-LABEL: andflag16ri: ; CHECK: # %bb.0: -; CHECK-NEXT: andw $-1235, %di, %cx # imm = 0xFB2D -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x2d,0xfb] +; CHECK-NEXT: # imm = 0xFB2D +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 1234, -1 %v0 = and i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -435,10 +452,12 @@ define i1 @andflag16ri(i16 %a) { define i1 @andflag32ri(i32 %a) { ; CHECK-LABEL: andflag32ri: ; CHECK: # %bb.0: -; CHECK-NEXT: andl $123456, %edi, %ecx # imm = 0x1E240 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = and i32 %a, 123456 ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -448,10 +467,12 @@ define i1 @andflag32ri(i32 %a) { define i1 @andflag64ri(i64 %a) { ; CHECK-LABEL: andflag64ri: ; CHECK: # %bb.0: -; CHECK-NEXT: andq $123456, %rdi, %rcx # imm = 0x1E240 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = and i64 %a, 123456 ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -461,10 +482,11 @@ define i1 @andflag64ri(i64 %a) { define i1 @andflag16ri8(i16 %a) { ; CHECK-LABEL: andflag16ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: andw $-124, %di, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x84,0xff] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 123, -1 %v0 = and i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -475,10 +497,11 @@ define i1 @andflag16ri8(i16 %a) { define i1 @andflag32ri8(i32 %a) { ; CHECK-LABEL: andflag32ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: andl $123, %edi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = and i32 %a, 123 ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -488,10 +511,11 @@ define i1 @andflag32ri8(i32 %a) { define i1 @andflag64ri8(i64 %a) { ; CHECK-LABEL: andflag64ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: andq $123, %rdi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: andq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = and i64 %a, 123 ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -501,8 +525,8 @@ define i1 @andflag64ri8(i64 %a) { define void @and8mr_legacy(ptr %a, i8 noundef %b) { ; CHECK-LABEL: and8mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andb %sil, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: andb %sil, (%rdi) # encoding: [0x40,0x20,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %and = and i8 %t, %b @@ -513,8 +537,8 @@ entry: define void @and16mr_legacy(ptr %a, i16 noundef %b) { ; CHECK-LABEL: and16mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andw %si, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: andw %si, (%rdi) # encoding: [0x66,0x21,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %and = and i16 %t, %b @@ -525,8 +549,8 @@ entry: define void @and32mr_legacy(ptr %a, i32 noundef %b) { ; CHECK-LABEL: and32mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl %esi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: andl %esi, (%rdi) # encoding: [0x21,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %and = and i32 %t, %b @@ -537,8 +561,8 @@ entry: define void @and64mr_legacy(ptr %a, i64 noundef %b) { ; CHECK-LABEL: and64mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andq %rsi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: andq %rsi, (%rdi) # encoding: [0x48,0x21,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %and = and i64 %t, %b @@ -549,8 +573,8 @@ entry: define void @and8mi_legacy(ptr %a) { ; CHECK-LABEL: and8mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andb $123, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: andb $123, (%rdi) # encoding: [0x80,0x27,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %and = and i8 %t, 123 @@ -561,8 +585,9 @@ entry: define void @and16mi_legacy(ptr %a) { ; CHECK-LABEL: and16mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andw $1234, (%rdi) # imm = 0x4D2 -; CHECK-NEXT: retq +; CHECK-NEXT: andw $1234, (%rdi) # encoding: [0x66,0x81,0x27,0xd2,0x04] +; CHECK-NEXT: # imm = 0x4D2 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %and = and i16 %t, 1234 @@ -573,8 +598,9 @@ entry: define void @and32mi_legacy(ptr %a) { ; CHECK-LABEL: and32mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andl $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: andl $123456, (%rdi) # encoding: [0x81,0x27,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %and = and i32 %t, 123456 @@ -585,8 +611,9 @@ entry: define void @and64mi_legacy(ptr %a) { ; CHECK-LABEL: and64mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: andq $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: andq $123456, (%rdi) # encoding: [0x48,0x81,0x27,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %and = and i64 %t, 123456 diff --git a/llvm/test/CodeGen/X86/apx/or.ll b/llvm/test/CodeGen/X86/apx/or.ll index abd74059dff0..1219e74074a9 100644 --- a/llvm/test/CodeGen/X86/apx/or.ll +++ b/llvm/test/CodeGen/X86/apx/or.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s define i8 @or8rr(i8 noundef %a, i8 noundef %b) { ; CHECK-LABEL: or8rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl %esi, %edi, %eax +; CHECK-NEXT: orl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0xf7] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i8 %a, %b ret i8 %or @@ -15,9 +15,9 @@ entry: define i16 @or16rr(i16 noundef %a, i16 noundef %b) { ; CHECK-LABEL: or16rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl %esi, %edi, %eax +; CHECK-NEXT: orl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0xf7] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i16 %a, %b ret i16 %or @@ -26,8 +26,8 @@ entry: define i32 @or32rr(i32 noundef %a, i32 noundef %b) { ; CHECK-LABEL: or32rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl %esi, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: orl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i32 %a, %b ret i32 %or @@ -36,8 +36,8 @@ entry: define i64 @or64rr(i64 noundef %a, i64 noundef %b) { ; CHECK-LABEL: or64rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: orq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x09,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i64 %a, %b ret i64 %or @@ -46,8 +46,8 @@ entry: define i8 @or8rm(i8 noundef %a, ptr %b) { ; CHECK-LABEL: or8rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orb (%rsi), %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: orb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x0a,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i8, ptr %b %or = or i8 %a, %t @@ -57,8 +57,8 @@ entry: define i16 @or16rm(i16 noundef %a, ptr %b) { ; CHECK-LABEL: or16rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orw (%rsi), %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: orw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x0b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i16, ptr %b %or = or i16 %a, %t @@ -68,8 +68,8 @@ entry: define i32 @or32rm(i32 noundef %a, ptr %b) { ; CHECK-LABEL: or32rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl (%rsi), %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: orl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x0b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i32, ptr %b %or = or i32 %a, %t @@ -79,8 +79,8 @@ entry: define i64 @or64rm(i64 noundef %a, ptr %b) { ; CHECK-LABEL: or64rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq (%rsi), %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: orq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x0b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i64, ptr %b %or = or i64 %a, %t @@ -90,9 +90,9 @@ entry: define i16 @or16ri8(i16 noundef %a) { ; CHECK-LABEL: or16ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl $123, %edi, %eax +; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i16 %a, 123 ret i16 %or @@ -101,8 +101,8 @@ entry: define i32 @or32ri8(i32 noundef %a) { ; CHECK-LABEL: or32ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl $123, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i32 %a, 123 ret i32 %or @@ -111,8 +111,8 @@ entry: define i64 @or64ri8(i64 noundef %a) { ; CHECK-LABEL: or64ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq $123, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: orq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i64 %a, 123 ret i64 %or @@ -121,8 +121,8 @@ entry: define i8 @or8ri(i8 noundef %a) { ; CHECK-LABEL: or8ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orb $123, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: orb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xcf,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i8 %a, 123 ret i8 %or @@ -131,9 +131,10 @@ entry: define i16 @or16ri(i16 noundef %a) { ; CHECK-LABEL: or16ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl $1234, %edi, %eax # imm = 0x4D2 +; CHECK-NEXT: orl $1234, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xcf,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i16 %a, 1234 ret i16 %or @@ -142,8 +143,9 @@ entry: define i32 @or32ri(i32 noundef %a) { ; CHECK-LABEL: or32ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl $123456, %edi, %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: orl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i32 %a, 123456 ret i32 %or @@ -152,8 +154,9 @@ entry: define i64 @or64ri(i64 noundef %a) { ; CHECK-LABEL: or64ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq $123456, %rdi, %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: orq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %or = or i64 %a, 123456 ret i64 %or @@ -162,8 +165,8 @@ entry: define i8 @or8mr(ptr %a, i8 noundef %b) { ; CHECK-LABEL: or8mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orb %sil, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: orb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x08,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %or = or i8 %t, %b @@ -173,8 +176,8 @@ entry: define i16 @or16mr(ptr %a, i16 noundef %b) { ; CHECK-LABEL: or16mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orw %si, (%rdi), %ax -; CHECK-NEXT: retq +; CHECK-NEXT: orw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x09,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %or = or i16 %t, %b @@ -184,8 +187,8 @@ entry: define i32 @or32mr(ptr %a, i32 noundef %b) { ; CHECK-LABEL: or32mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl %esi, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: orl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x09,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %or = or i32 %t, %b @@ -195,8 +198,8 @@ entry: define i64 @or64mr(ptr %a, i64 noundef %b) { ; CHECK-LABEL: or64mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq %rsi, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: orq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x09,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %or = or i64 %t, %b @@ -206,10 +209,10 @@ entry: define i16 @or16mi8(ptr %a) { ; CHECK-LABEL: or16mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: orl $123, %eax +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: orl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc8,0x7b] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %or = or i16 %t, 123 @@ -219,8 +222,8 @@ entry: define i32 @or32mi8(ptr %a) { ; CHECK-LABEL: or32mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl $123, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: orl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x0f,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %or = or i32 %t, 123 @@ -230,8 +233,8 @@ entry: define i64 @or64mi8(ptr %a) { ; CHECK-LABEL: or64mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq $123, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: orq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x0f,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %or = or i64 %t, 123 @@ -241,8 +244,8 @@ entry: define i8 @or8mi(ptr %a) { ; CHECK-LABEL: or8mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orb $123, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: orb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x0f,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %or = or i8 %t, 123 @@ -252,10 +255,11 @@ entry: define i16 @or16mi(ptr %a) { ; CHECK-LABEL: or16mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: orl $1234, %eax # imm = 0x4D2 +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: orl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x0d,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %or = or i16 %t, 1234 @@ -265,8 +269,9 @@ entry: define i32 @or32mi(ptr %a) { ; CHECK-LABEL: or32mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl $123456, (%rdi), %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: orl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x0f,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %or = or i32 %t, 123456 @@ -276,8 +281,9 @@ entry: define i64 @or64mi(ptr %a) { ; CHECK-LABEL: or64mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq $123456, (%rdi), %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: orq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x0f,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %or = or i64 %t, 123456 @@ -289,11 +295,12 @@ entry: define i1 @orflag8rr(i8 %a, i8 %b) { ; CHECK-LABEL: orflag8rr: ; CHECK: # %bb.0: -; CHECK-NEXT: notb %sil, %al -; CHECK-NEXT: orb %al, %dil, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6] +; CHECK-NEXT: orb %al, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x08,0xc7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i8 %b, -1 %v0 = or i8 %a, %xor ; 0xff << 50 %v1 = icmp eq i8 %v0, 0 @@ -304,11 +311,12 @@ define i1 @orflag8rr(i8 %a, i8 %b) { define i1 @orflag16rr(i16 %a, i16 %b) { ; CHECK-LABEL: orflag16rr: ; CHECK: # %bb.0: -; CHECK-NEXT: notl %esi, %eax -; CHECK-NEXT: orw %ax, %di, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6] +; CHECK-NEXT: orw %ax, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x09,0xc7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 %b, -1 %v0 = or i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -319,10 +327,11 @@ define i1 @orflag16rr(i16 %a, i16 %b) { define i1 @orflag32rr(i32 %a, i32 %b) { ; CHECK-LABEL: orflag32rr: ; CHECK: # %bb.0: -; CHECK-NEXT: orl %esi, %edi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x09,0xf7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = or i32 %a, %b ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -332,10 +341,11 @@ define i1 @orflag32rr(i32 %a, i32 %b) { define i1 @orflag64rr(i64 %a, i64 %b) { ; CHECK-LABEL: orflag64rr: ; CHECK: # %bb.0: -; CHECK-NEXT: orq %rsi, %rdi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x09,0xf7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = or i64 %a, %b ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -345,11 +355,12 @@ define i1 @orflag64rr(i64 %a, i64 %b) { define i1 @orflag8rm(ptr %ptr, i8 %b) { ; CHECK-LABEL: orflag8rm: ; CHECK: # %bb.0: -; CHECK-NEXT: notb %sil, %al -; CHECK-NEXT: orb (%rdi), %al, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6] +; CHECK-NEXT: orb (%rdi), %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x0a,0x07] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i8, ptr %ptr %xor = xor i8 %b, -1 %v0 = or i8 %a, %xor ; 0xff << 50 @@ -361,11 +372,12 @@ define i1 @orflag8rm(ptr %ptr, i8 %b) { define i1 @orflag16rm(ptr %ptr, i16 %b) { ; CHECK-LABEL: orflag16rm: ; CHECK: # %bb.0: -; CHECK-NEXT: notl %esi, %eax -; CHECK-NEXT: orw (%rdi), %ax, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: notl %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd6] +; CHECK-NEXT: orw (%rdi), %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x0b,0x07] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %xor = xor i16 %b, -1 %v0 = or i16 %a, %xor ; 0xff << 50 @@ -377,10 +389,11 @@ define i1 @orflag16rm(ptr %ptr, i16 %b) { define i1 @orflag32rm(ptr %ptr, i32 %b) { ; CHECK-LABEL: orflag32rm: ; CHECK: # %bb.0: -; CHECK-NEXT: orl (%rdi), %esi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orl (%rdi), %esi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x0b,0x37] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %v0 = or i32 %a, %b ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 @@ -391,10 +404,11 @@ define i1 @orflag32rm(ptr %ptr, i32 %b) { define i1 @orflag64rm(ptr %ptr, i64 %b) { ; CHECK-LABEL: orflag64rm: ; CHECK: # %bb.0: -; CHECK-NEXT: orq (%rdi), %rsi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orq (%rdi), %rsi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x0b,0x37] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %v0 = or i64 %a, %b ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 @@ -405,10 +419,11 @@ define i1 @orflag64rm(ptr %ptr, i64 %b) { define i1 @orflag8ri(i8 %a) { ; CHECK-LABEL: orflag8ri: ; CHECK: # %bb.0: -; CHECK-NEXT: orb $-124, %dil, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xcf,0x84] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i8 123, -1 %v0 = or i8 %a, %xor ; 0xff << 50 %v1 = icmp eq i8 %v0, 0 @@ -419,10 +434,12 @@ define i1 @orflag8ri(i8 %a) { define i1 @orflag16ri(i16 %a) { ; CHECK-LABEL: orflag16ri: ; CHECK: # %bb.0: -; CHECK-NEXT: orw $-1235, %di, %cx # imm = 0xFB2D -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xcf,0x2d,0xfb] +; CHECK-NEXT: # imm = 0xFB2D +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 1234, -1 %v0 = or i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -433,10 +450,12 @@ define i1 @orflag16ri(i16 %a) { define i1 @orflag32ri(i32 %a) { ; CHECK-LABEL: orflag32ri: ; CHECK: # %bb.0: -; CHECK-NEXT: orl $123456, %edi, %ecx # imm = 0x1E240 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = or i32 %a, 123456 ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -446,10 +465,12 @@ define i1 @orflag32ri(i32 %a) { define i1 @orflag64ri(i64 %a) { ; CHECK-LABEL: orflag64ri: ; CHECK: # %bb.0: -; CHECK-NEXT: orq $123456, %rdi, %rcx # imm = 0x1E240 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xcf,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = or i64 %a, 123456 ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -459,10 +480,11 @@ define i1 @orflag64ri(i64 %a) { define i1 @orflag16ri8(i16 %a) { ; CHECK-LABEL: orflag16ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: orw $-124, %di, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xcf,0x84,0xff] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 123, -1 %v0 = or i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -473,10 +495,11 @@ define i1 @orflag16ri8(i16 %a) { define i1 @orflag32ri8(i32 %a) { ; CHECK-LABEL: orflag32ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: orl $123, %edi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = or i32 %a, 123 ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -486,10 +509,11 @@ define i1 @orflag32ri8(i32 %a) { define i1 @orflag64ri8(i64 %a) { ; CHECK-LABEL: orflag64ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: orq $123, %rdi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: orq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = or i64 %a, 123 ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -499,8 +523,8 @@ define i1 @orflag64ri8(i64 %a) { define void @or8mr_legacy(ptr %a, i8 noundef %b) { ; CHECK-LABEL: or8mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orb %sil, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: orb %sil, (%rdi) # encoding: [0x40,0x08,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %or = or i8 %t, %b @@ -511,8 +535,8 @@ entry: define void @or16mr_legacy(ptr %a, i16 noundef %b) { ; CHECK-LABEL: or16mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orw %si, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: orw %si, (%rdi) # encoding: [0x66,0x09,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %or = or i16 %t, %b @@ -523,8 +547,8 @@ entry: define void @or32mr_legacy(ptr %a, i32 noundef %b) { ; CHECK-LABEL: or32mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl %esi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: orl %esi, (%rdi) # encoding: [0x09,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %or = or i32 %t, %b @@ -535,8 +559,8 @@ entry: define void @or64mr_legacy(ptr %a, i64 noundef %b) { ; CHECK-LABEL: or64mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq %rsi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: orq %rsi, (%rdi) # encoding: [0x48,0x09,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %or = or i64 %t, %b @@ -547,8 +571,8 @@ entry: define void @or8mi_legacy(ptr %a) { ; CHECK-LABEL: or8mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orb $123, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: orb $123, (%rdi) # encoding: [0x80,0x0f,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %or = or i8 %t, 123 @@ -559,8 +583,9 @@ entry: define void @or16mi_legacy(ptr %a) { ; CHECK-LABEL: or16mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orw $1234, (%rdi) # imm = 0x4D2 -; CHECK-NEXT: retq +; CHECK-NEXT: orw $1234, (%rdi) # encoding: [0x66,0x81,0x0f,0xd2,0x04] +; CHECK-NEXT: # imm = 0x4D2 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %or = or i16 %t, 1234 @@ -571,8 +596,9 @@ entry: define void @or32mi_legacy(ptr %a) { ; CHECK-LABEL: or32mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orl $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: orl $123456, (%rdi) # encoding: [0x81,0x0f,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %or = or i32 %t, 123456 @@ -583,8 +609,9 @@ entry: define void @or64mi_legacy(ptr %a) { ; CHECK-LABEL: or64mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: orq $123456, (%rdi) # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: orq $123456, (%rdi) # encoding: [0x48,0x81,0x0f,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %or = or i64 %t, 123456 diff --git a/llvm/test/CodeGen/X86/apx/sbb.ll b/llvm/test/CodeGen/X86/apx/sbb.ll index 256a1c7c381f..755193588a7b 100644 --- a/llvm/test/CodeGen/X86/apx/sbb.ll +++ b/llvm/test/CodeGen/X86/apx/sbb.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s define i8 @sbb8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: sbb8rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: sbbb %sil, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: sbbb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i8 %a, %b %k = icmp ugt i8 %x, %y %z = zext i1 %k to i8 @@ -17,9 +17,9 @@ define i8 @sbb8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind { define i16 @sbb16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: sbbw %si, %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: sbbw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i16 %a, %b %k = icmp ugt i16 %x, %y %z = zext i1 %k to i16 @@ -30,9 +30,9 @@ define i16 @sbb16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind { define i32 @sbb32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: sbbl %esi, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: sbbl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i32 %a, %b %k = icmp ugt i32 %x, %y %z = zext i1 %k to i32 @@ -43,9 +43,9 @@ define i32 @sbb32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { define i64 @sbb64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64rr: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: sbbq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: sbbq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i64 %a, %b %k = icmp ugt i64 %x, %y %z = zext i1 %k to i64 @@ -56,9 +56,9 @@ define i64 @sbb64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind { define i8 @sbb8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: sbb8rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: sbbb (%rsi), %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: sbbb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x1a,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i8, ptr %ptr %s = sub i8 %a, %b %k = icmp ugt i8 %x, %y @@ -70,9 +70,9 @@ define i8 @sbb8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { define i16 @sbb16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: sbbw (%rsi), %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: sbbw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x1b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i16, ptr %ptr %s = sub i16 %a, %b %k = icmp ugt i16 %x, %y @@ -84,9 +84,9 @@ define i16 @sbb16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @sbb32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: sbbl (%rsi), %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: sbbl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x1b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i32, ptr %ptr %s = sub i32 %a, %b %k = icmp ugt i32 %x, %y @@ -98,9 +98,9 @@ define i32 @sbb32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @sbb64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64rm: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: sbbq (%rsi), %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: sbbq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x1b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i64, ptr %ptr %s = sub i64 %a, %b %k = icmp ugt i64 %x, %y @@ -112,11 +112,11 @@ define i64 @sbb64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { define i16 @sbb16ri8(i16 %a, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: sbbw $0, %di, %ax -; CHECK-NEXT: addl $-123, %eax +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xdf,0x00,0x00] +; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i16 %a, 123 %k = icmp ugt i16 %x, %y %z = zext i1 %k to i16 @@ -127,10 +127,10 @@ define i16 @sbb16ri8(i16 %a, i16 %x, i16 %y) nounwind { define i32 @sbb32ri8(i32 %a, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: sbbl $0, %edi, %eax -; CHECK-NEXT: addl $-123, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xdf,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i32 %a, 123 %k = icmp ugt i32 %x, %y %z = zext i1 %k to i32 @@ -141,10 +141,10 @@ define i32 @sbb32ri8(i32 %a, i32 %x, i32 %y) nounwind { define i64 @sbb64ri8(i64 %a, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: sbbq $0, %rdi, %rax -; CHECK-NEXT: addq $-123, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xdf,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i64 %a, 123 %k = icmp ugt i64 %x, %y %z = zext i1 %k to i64 @@ -155,10 +155,10 @@ define i64 @sbb64ri8(i64 %a, i64 %x, i64 %y) nounwind { define i8 @sbb8ri(i8 %a, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: sbb8ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %sil, %dl, %al -; CHECK-NEXT: sbbb $0, %dil, %al -; CHECK-NEXT: addb $-123, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2] +; CHECK-NEXT: sbbb $0, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xdf,0x00] +; CHECK-NEXT: addb $-123, %al # EVEX TO LEGACY Compression encoding: [0x04,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i8 %a, 123 %k = icmp ugt i8 %x, %y %z = zext i1 %k to i8 @@ -169,11 +169,12 @@ define i8 @sbb8ri(i8 %a, i8 %x, i8 %y) nounwind { define i16 @sbb16ri(i16 %a, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: sbbw $0, %di, %ax -; CHECK-NEXT: addl $-1234, %eax # imm = 0xFB2E +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xdf,0x00,0x00] +; CHECK-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff] +; CHECK-NEXT: # imm = 0xFB2E ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i16 %a, 1234 %k = icmp ugt i16 %x, %y %z = zext i1 %k to i16 @@ -184,10 +185,11 @@ define i16 @sbb16ri(i16 %a, i16 %x, i16 %y) nounwind { define i32 @sbb32ri(i32 %a, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: sbbl $0, %edi, %eax -; CHECK-NEXT: addl $-123456, %eax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xdf,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i32 %a, 123456 %k = icmp ugt i32 %x, %y %z = zext i1 %k to i32 @@ -198,10 +200,11 @@ define i32 @sbb32ri(i32 %a, i32 %x, i32 %y) nounwind { define i64 @sbb64ri(i64 %a, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64ri: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: sbbq $0, %rdi, %rax -; CHECK-NEXT: addq $-123456, %rax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xdf,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] %s = sub i64 %a, 123456 %k = icmp ugt i64 %x, %y %z = zext i1 %k to i64 @@ -212,9 +215,9 @@ define i64 @sbb64ri(i64 %a, i64 %x, i64 %y) nounwind { define i8 @sbb8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: sbb8mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: sbbb %dil, (%rsi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: sbbb %dil, (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i8, ptr %ptr %s = sub i8 %b, %a %k = icmp ugt i8 %x, %y @@ -226,9 +229,9 @@ define i8 @sbb8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { define i16 @sbb16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: sbbw %di, (%rsi), %ax -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: sbbw %di, (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i16, ptr %ptr %s = sub i16 %b, %a %k = icmp ugt i16 %x, %y @@ -240,9 +243,9 @@ define i16 @sbb16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @sbb32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: sbbl %edi, (%rsi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: sbbl %edi, (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i32, ptr %ptr %s = sub i32 %b, %a %k = icmp ugt i32 %x, %y @@ -254,9 +257,9 @@ define i32 @sbb32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @sbb64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64mr: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: sbbq %rdi, (%rsi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: sbbq %rdi, (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i64, ptr %ptr %s = sub i64 %b, %a %k = icmp ugt i64 %x, %y @@ -268,11 +271,11 @@ define i64 @sbb64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { define i16 @sbb16mi8(ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16mi8: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: sbbw $0, (%rdi), %ax -; CHECK-NEXT: addl $-123, %eax +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x1f,0x00,0x00] +; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %s = sub i16 %a, 123 %k = icmp ugt i16 %x, %y @@ -284,10 +287,10 @@ define i16 @sbb16mi8(ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @sbb32mi8(ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32mi8: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: sbbl $0, (%rdi), %eax -; CHECK-NEXT: addl $-123, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x1f,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %s = sub i32 %a, 123 %k = icmp ugt i32 %x, %y @@ -299,10 +302,10 @@ define i32 @sbb32mi8(ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @sbb64mi8(ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64mi8: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: sbbq $0, (%rdi), %rax -; CHECK-NEXT: addq $-123, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x1f,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %s = sub i64 %a, 123 %k = icmp ugt i64 %x, %y @@ -314,10 +317,10 @@ define i64 @sbb64mi8(ptr %ptr, i64 %x, i64 %y) nounwind { define i8 @sbb8mi(ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: sbb8mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %sil, %dl, %al -; CHECK-NEXT: sbbb $0, (%rdi), %al -; CHECK-NEXT: addb $-123, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, %dl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf2] +; CHECK-NEXT: sbbb $0, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x1f,0x00] +; CHECK-NEXT: addb $-123, %al # EVEX TO LEGACY Compression encoding: [0x04,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i8, ptr %ptr %s = sub i8 %a, 123 %k = icmp ugt i8 %x, %y @@ -329,11 +332,12 @@ define i8 @sbb8mi(ptr %ptr, i8 %x, i8 %y) nounwind { define i16 @sbb16mi(ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %si, %dx, %ax -; CHECK-NEXT: sbbw $0, (%rdi), %ax -; CHECK-NEXT: addl $-1234, %eax # imm = 0xFB2E +; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2] +; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x1f,0x00,0x00] +; CHECK-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff] +; CHECK-NEXT: # imm = 0xFB2E ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %s = sub i16 %a, 1234 %k = icmp ugt i16 %x, %y @@ -345,10 +349,11 @@ define i16 @sbb16mi(ptr %ptr, i16 %x, i16 %y) nounwind { define i32 @sbb32mi(ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %esi, %edx, %eax -; CHECK-NEXT: sbbl $0, (%rdi), %eax -; CHECK-NEXT: addl $-123456, %eax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2] +; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x1f,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %s = sub i32 %a, 123456 %k = icmp ugt i32 %x, %y @@ -360,10 +365,11 @@ define i32 @sbb32mi(ptr %ptr, i32 %x, i32 %y) nounwind { define i64 @sbb64mi(ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64mi: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rsi, %rdx, %rax -; CHECK-NEXT: sbbq $0, (%rdi), %rax -; CHECK-NEXT: addq $-123456, %rax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2] +; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x1f,0x00,0x00,0x00,0x00] +; CHECK-NEXT: addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %s = sub i64 %a, 123456 %k = icmp ugt i64 %x, %y @@ -375,9 +381,9 @@ define i64 @sbb64mi(ptr %ptr, i64 %x, i64 %y) nounwind { define void @sbb8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { ; CHECK-LABEL: sbb8mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subb %dl, %cl, %al -; CHECK-NEXT: sbbb %dil, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subb %dl, %cl, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xd1] +; CHECK-NEXT: sbbb %dil, (%rsi) # encoding: [0x40,0x18,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i8, ptr %ptr %s = sub i8 %b, %a %k = icmp ugt i8 %x, %y @@ -390,9 +396,9 @@ define void @sbb8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { define void @sbb16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { ; CHECK-LABEL: sbb16mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subw %dx, %cx, %ax -; CHECK-NEXT: sbbw %di, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subw %dx, %cx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xd1] +; CHECK-NEXT: sbbw %di, (%rsi) # encoding: [0x66,0x19,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i16, ptr %ptr %s = sub i16 %b, %a %k = icmp ugt i16 %x, %y @@ -405,9 +411,9 @@ define void @sbb16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { define void @sbb32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { ; CHECK-LABEL: sbb32mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subl %edx, %ecx, %eax -; CHECK-NEXT: sbbl %edi, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subl %edx, %ecx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xd1] +; CHECK-NEXT: sbbl %edi, (%rsi) # encoding: [0x19,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i32, ptr %ptr %s = sub i32 %b, %a %k = icmp ugt i32 %x, %y @@ -420,9 +426,9 @@ define void @sbb32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { define void @sbb64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { ; CHECK-LABEL: sbb64mr_legacy: ; CHECK: # %bb.0: -; CHECK-NEXT: subq %rdx, %rcx, %rax -; CHECK-NEXT: sbbq %rdi, (%rsi) -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rdx, %rcx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xd1] +; CHECK-NEXT: sbbq %rdi, (%rsi) # encoding: [0x48,0x19,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] %b = load i64, ptr %ptr %s = sub i64 %b, %a %k = icmp ugt i64 %x, %y diff --git a/llvm/test/CodeGen/X86/apx/sub.ll b/llvm/test/CodeGen/X86/apx/sub.ll index 862d17a6e8d1..aaf45c6b499c 100644 --- a/llvm/test/CodeGen/X86/apx/sub.ll +++ b/llvm/test/CodeGen/X86/apx/sub.ll @@ -1,11 +1,11 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s define i8 @sub8rr(i8 noundef %a, i8 noundef %b) { ; CHECK-LABEL: sub8rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subb %sil, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i8 %a, %b ret i8 %sub @@ -14,9 +14,9 @@ entry: define i16 @sub16rr(i16 noundef %a, i16 noundef %b) { ; CHECK-LABEL: sub16rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subl %esi, %edi, %eax +; CHECK-NEXT: subl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf7] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i16 %a, %b ret i16 %sub @@ -25,8 +25,8 @@ entry: define i32 @sub32rr(i32 noundef %a, i32 noundef %b) { ; CHECK-LABEL: sub32rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subl %esi, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i32 %a, %b ret i32 %sub @@ -35,8 +35,8 @@ entry: define i64 @sub64rr(i64 noundef %a, i64 noundef %b) { ; CHECK-LABEL: sub64rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i64 %a, %b ret i64 %sub @@ -45,8 +45,8 @@ entry: define i8 @sub8rm(i8 noundef %a, ptr %ptr) { ; CHECK-LABEL: sub8rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subb (%rsi), %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x2a,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i8, ptr %ptr %sub = sub i8 %a, %b @@ -56,8 +56,8 @@ entry: define i16 @sub16rm(i16 noundef %a, ptr %ptr) { ; CHECK-LABEL: sub16rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subw (%rsi), %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: subw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x2b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i16, ptr %ptr %sub = sub i16 %a, %b @@ -67,8 +67,8 @@ entry: define i32 @sub32rm(i32 noundef %a, ptr %ptr) { ; CHECK-LABEL: sub32rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subl (%rsi), %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x2b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i32, ptr %ptr %sub = sub i32 %a, %b @@ -78,8 +78,8 @@ entry: define i64 @sub64rm(i64 noundef %a, ptr %ptr) { ; CHECK-LABEL: sub64rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subq (%rsi), %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x2b,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %b = load i64, ptr %ptr %sub = sub i64 %a, %b @@ -89,9 +89,9 @@ entry: define i16 @sub16ri8(i16 noundef %a) { ; CHECK-LABEL: sub16ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $-123, %edi, %eax +; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x85,0xff,0xff,0xff] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i16 %a, 123 ret i16 %sub @@ -100,8 +100,8 @@ entry: define i32 @sub32ri8(i32 noundef %a) { ; CHECK-LABEL: sub32ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $-123, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x85,0xff,0xff,0xff] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i32 %a, 123 ret i32 %sub @@ -110,8 +110,8 @@ entry: define i64 @sub64ri8(i64 noundef %a) { ; CHECK-LABEL: sub64ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $-123, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq $-123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x85,0xff,0xff,0xff] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i64 %a, 123 ret i64 %sub @@ -120,8 +120,8 @@ entry: define i8 @sub8ri(i8 noundef %a) { ; CHECK-LABEL: sub8ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb $-123, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: addb $-123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xc7,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i8 %a, 123 ret i8 %sub @@ -130,9 +130,10 @@ entry: define i16 @sub16ri(i16 noundef %a) { ; CHECK-LABEL: sub16ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $-1234, %edi, %eax # imm = 0xFB2E +; CHECK-NEXT: addl $-1234, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x2e,0xfb,0xff,0xff] +; CHECK-NEXT: # imm = 0xFB2E ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i16 %a, 1234 ret i16 %sub @@ -141,8 +142,9 @@ entry: define i32 @sub32ri(i32 noundef %a) { ; CHECK-LABEL: sub32ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $-123456, %edi, %eax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: addl $-123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i32 %a, 123456 ret i32 %sub @@ -151,8 +153,9 @@ entry: define i64 @sub64ri(i64 noundef %a) { ; CHECK-LABEL: sub64ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $-123456, %rdi, %rax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: addq $-123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = sub i64 %a, 123456 ret i64 %sub @@ -161,8 +164,8 @@ entry: define i8 @sub8mr(ptr %a, i8 noundef %b) { ; CHECK-LABEL: sub8mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subb %sil, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %sub = sub nsw i8 %t, %b @@ -172,10 +175,10 @@ entry: define i16 @sub16mr(ptr %a, i16 noundef %b) { ; CHECK-LABEL: sub16mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: subl %esi, %eax +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: subl %esi, %eax # EVEX TO LEGACY Compression encoding: [0x29,0xf0] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %sub = sub nsw i16 %t, %b @@ -185,8 +188,8 @@ entry: define i32 @sub32mr(ptr %a, i32 noundef %b) { ; CHECK-LABEL: sub32mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subl %esi, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %sub = sub nsw i32 %t, %b @@ -196,8 +199,8 @@ entry: define i64 @sub64mr(ptr %a, i64 noundef %b) { ; CHECK-LABEL: sub64mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subq %rsi, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %sub = sub nsw i64 %t, %b @@ -207,10 +210,10 @@ entry: define i16 @sub16mi8(ptr %a) { ; CHECK-LABEL: sub16mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: addl $-123, %eax +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %sub = sub nsw i16 %t, 123 @@ -220,8 +223,8 @@ entry: define i32 @sub32mi8(ptr %a) { ; CHECK-LABEL: sub32mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $-123, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: addl $-123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0x85,0xff,0xff,0xff] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %sub = sub nsw i32 %t, 123 @@ -231,8 +234,8 @@ entry: define i64 @sub64mi8(ptr %a) { ; CHECK-LABEL: sub64mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $-123, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: addq $-123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0x85,0xff,0xff,0xff] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %sub = sub nsw i64 %t, 123 @@ -242,8 +245,8 @@ entry: define i8 @sub8mi(ptr %a) { ; CHECK-LABEL: sub8mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb $-123, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: addb $-123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x07,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %sub = sub nsw i8 %t, 123 @@ -253,10 +256,11 @@ entry: define i16 @sub16mi(ptr %a) { ; CHECK-LABEL: sub16mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: addl $-1234, %eax # imm = 0xFB2E +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff] +; CHECK-NEXT: # imm = 0xFB2E ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %sub = sub nsw i16 %t, 1234 @@ -266,8 +270,9 @@ entry: define i32 @sub32mi(ptr %a) { ; CHECK-LABEL: sub32mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $-123456, (%rdi), %eax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: addl $-123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %sub = sub nsw i32 %t, 123456 @@ -277,8 +282,9 @@ entry: define i64 @sub64mi(ptr %a) { ; CHECK-LABEL: sub64mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $-123456, (%rdi), %rax # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: addq $-123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %sub = sub nsw i64 %t, 123456 @@ -293,12 +299,12 @@ declare i64 @llvm.usub.sat.i64(i64, i64) define i8 @subflag8rr(i8 noundef %a, i8 noundef %b) { ; CHECK-LABEL: subflag8rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subb %sil, %dil, %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf7] +; CHECK-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 %b) ret i8 %sub @@ -307,11 +313,11 @@ entry: define i16 @subflag16rr(i16 noundef %a, i16 noundef %b) { ; CHECK-LABEL: subflag16rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subw %si, %di, %ax -; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf7] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 %b) ret i16 %sub @@ -320,10 +326,10 @@ entry: define i32 @subflag32rr(i32 noundef %a, i32 noundef %b) { ; CHECK-LABEL: subflag32rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subl %esi, %edi, %eax -; CHECK-NEXT: cmovbl %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf7] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 %b) ret i32 %sub @@ -332,10 +338,10 @@ entry: define i64 @subflag64rr(i64 noundef %a, i64 noundef %b) { ; CHECK-LABEL: subflag64rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: subq %rsi, %rdi, %rcx -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] +; CHECK-NEXT: subq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x29,0xf7] +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b) ret i64 %sub @@ -344,12 +350,12 @@ entry: define i8 @subflag8rm(i8 noundef %a, ptr %b) { ; CHECK-LABEL: subflag8rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subb (%rsi), %dil, %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x2a,0x3e] +; CHECK-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i8, ptr %b %sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 %t) @@ -359,11 +365,11 @@ entry: define i16 @subflag16rm(i16 noundef %a, ptr %b) { ; CHECK-LABEL: subflag16rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subw (%rsi), %di, %ax -; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x2b,0x3e] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i16, ptr %b %sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 %t) @@ -373,10 +379,10 @@ entry: define i32 @subflag32rm(i32 noundef %a, ptr %b) { ; CHECK-LABEL: subflag32rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subl (%rsi), %edi, %eax -; CHECK-NEXT: cmovbl %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x2b,0x3e] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i32, ptr %b %sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 %t) @@ -386,10 +392,10 @@ entry: define i64 @subflag64rm(i64 noundef %a, ptr %b) { ; CHECK-LABEL: subflag64rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: subq (%rsi), %rdi, %rcx -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] +; CHECK-NEXT: subq (%rsi), %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x2b,0x3e] +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i64, ptr %b %sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 %t) @@ -399,11 +405,11 @@ entry: define i16 @subflag16ri8(i16 noundef %a) { ; CHECK-LABEL: subflag16ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subw $123, %di, %ax -; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xef,0x7b,0x00] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 123) ret i16 %sub @@ -412,10 +418,10 @@ entry: define i32 @subflag32ri8(i32 noundef %a) { ; CHECK-LABEL: subflag32ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subl $123, %edi, %eax -; CHECK-NEXT: cmovbl %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xef,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 123) ret i32 %sub @@ -424,10 +430,10 @@ entry: define i64 @subflag64ri8(i64 noundef %a) { ; CHECK-LABEL: subflag64ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: subq $123, %rdi, %rcx -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] +; CHECK-NEXT: subq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xef,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 123) ret i64 %sub @@ -436,12 +442,12 @@ entry: define i8 @subflag8ri(i8 noundef %a) { ; CHECK-LABEL: subflag8ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subb $123, %dil, %al -; CHECK-NEXT: movzbl %al, %eax -; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xef,0x7b] +; CHECK-NEXT: movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0] +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i8 @llvm.usub.sat.i8(i8 %a, i8 123) ret i8 %sub @@ -450,11 +456,12 @@ entry: define i16 @subflag16ri(i16 noundef %a) { ; CHECK-LABEL: subflag16ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subw $1234, %di, %ax # imm = 0x4D2 -; CHECK-NEXT: cmovbl %ecx, %eax +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subw $1234, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xef,0xd2,0x04] +; CHECK-NEXT: # imm = 0x4D2 +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i16 @llvm.usub.sat.i16(i16 %a, i16 1234) ret i16 %sub @@ -463,10 +470,11 @@ entry: define i32 @subflag32ri(i32 noundef %a) { ; CHECK-LABEL: subflag32ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %ecx, %ecx -; CHECK-NEXT: subl $123456, %edi, %eax # imm = 0x1E240 -; CHECK-NEXT: cmovbl %ecx, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9] +; CHECK-NEXT: subl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xef,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 123456) ret i32 %sub @@ -475,10 +483,11 @@ entry: define i64 @subflag64ri(i64 noundef %a) { ; CHECK-LABEL: subflag64ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: subq $123456, %rdi, %rcx # imm = 0x1E240 -; CHECK-NEXT: cmovaeq %rcx, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0] +; CHECK-NEXT: subq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xef,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 123456) ret i64 %sub @@ -491,16 +500,19 @@ declare void @f() define void @sub64ri_reloc(i64 %val) { ; CHECK-LABEL: sub64ri_reloc: ; CHECK: # %bb.0: -; CHECK-NEXT: subq $val, %rdi, %rax -; CHECK-NEXT: jbe .LBB41_2 +; CHECK-NEXT: subq $val, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xef,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 6, value: val, kind: reloc_signed_4byte +; CHECK-NEXT: jbe .LBB41_2 # encoding: [0x76,A] +; CHECK-NEXT: # fixup A - offset: 1, value: .LBB41_2-1, kind: FK_PCRel_1 ; CHECK-NEXT: # %bb.1: # %t -; CHECK-NEXT: pushq %rax +; CHECK-NEXT: pushq %rax # encoding: [0x50] ; CHECK-NEXT: .cfi_def_cfa_offset 16 -; CHECK-NEXT: callq f@PLT -; CHECK-NEXT: popq %rax +; CHECK-NEXT: callq f@PLT # encoding: [0xe8,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 1, value: f@PLT-4, kind: FK_PCRel_4 +; CHECK-NEXT: popq %rax # encoding: [0x58] ; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .LBB41_2: # %f -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] %cmp = icmp ugt i64 %val, ptrtoint (ptr @val to i64) br i1 %cmp, label %t, label %f @@ -515,8 +527,8 @@ f: define void @sub8mr_legacy(ptr %a, i8 noundef %b) { ; CHECK-LABEL: sub8mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subb %sil, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: subb %sil, (%rdi) # encoding: [0x40,0x28,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %sub = sub i8 %t, %b @@ -527,8 +539,8 @@ entry: define void @sub16mr_legacy(ptr %a, i16 noundef %b) { ; CHECK-LABEL: sub16mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subw %si, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: subw %si, (%rdi) # encoding: [0x66,0x29,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %sub = sub i16 %t, %b @@ -539,8 +551,8 @@ entry: define void @sub32mr_legacy(ptr %a, i32 noundef %b) { ; CHECK-LABEL: sub32mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subl %esi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: subl %esi, (%rdi) # encoding: [0x29,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %sub = sub i32 %t, %b @@ -551,8 +563,8 @@ entry: define void @sub64mr_legacy(ptr %a, i64 noundef %b) { ; CHECK-LABEL: sub64mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: subq %rsi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: subq %rsi, (%rdi) # encoding: [0x48,0x29,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %sub = sub i64 %t, %b @@ -563,8 +575,8 @@ entry: define void @sub8mi_legacy(ptr %a) { ; CHECK-LABEL: sub8mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addb $-123, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: addb $-123, (%rdi) # encoding: [0x80,0x07,0x85] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %sub = sub nsw i8 %t, 123 @@ -575,8 +587,9 @@ entry: define void @sub16mi_legacy(ptr %a) { ; CHECK-LABEL: sub16mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addw $-1234, (%rdi) # imm = 0xFB2E -; CHECK-NEXT: retq +; CHECK-NEXT: addw $-1234, (%rdi) # encoding: [0x66,0x81,0x07,0x2e,0xfb] +; CHECK-NEXT: # imm = 0xFB2E +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %sub = sub nsw i16 %t, 1234 @@ -587,8 +600,9 @@ entry: define void @sub32mi_legacy(ptr %a) { ; CHECK-LABEL: sub32mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addl $-123456, (%rdi) # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: addl $-123456, (%rdi) # encoding: [0x81,0x07,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %sub = sub nsw i32 %t, 123456 @@ -599,8 +613,9 @@ entry: define void @sub64mi_legacy(ptr %a) { ; CHECK-LABEL: sub64mi_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: addq $-123456, (%rdi) # imm = 0xFFFE1DC0 -; CHECK-NEXT: retq +; CHECK-NEXT: addq $-123456, (%rdi) # encoding: [0x48,0x81,0x07,0xc0,0x1d,0xfe,0xff] +; CHECK-NEXT: # imm = 0xFFFE1DC0 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %sub = sub nsw i64 %t, 123456 diff --git a/llvm/test/CodeGen/X86/apx/xor.ll b/llvm/test/CodeGen/X86/apx/xor.ll index 980119cb5218..d75f9f34d7b6 100644 --- a/llvm/test/CodeGen/X86/apx/xor.ll +++ b/llvm/test/CodeGen/X86/apx/xor.ll @@ -1,12 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s define i8 @xor8rr(i8 noundef %a, i8 noundef %b) { ; CHECK-LABEL: xor8rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %esi, %edi, %eax +; CHECK-NEXT: xorl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xf7] ; CHECK-NEXT: # kill: def $al killed $al killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i8 %a, %b ret i8 %xor @@ -15,9 +15,9 @@ entry: define i16 @xor16rr(i16 noundef %a, i16 noundef %b) { ; CHECK-LABEL: xor16rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %esi, %edi, %eax +; CHECK-NEXT: xorl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xf7] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i16 %a, %b ret i16 %xor @@ -26,8 +26,8 @@ entry: define i32 @xor32rr(i32 noundef %a, i32 noundef %b) { ; CHECK-LABEL: xor32rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %esi, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i32 %a, %b ret i32 %xor @@ -36,8 +36,8 @@ entry: define i64 @xor64rr(i64 noundef %a, i64 noundef %b) { ; CHECK-LABEL: xor64rr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq %rsi, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x31,0xf7] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i64 %a, %b ret i64 %xor @@ -46,8 +46,8 @@ entry: define i8 @xor8rm(i8 noundef %a, ptr %b) { ; CHECK-LABEL: xor8rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorb (%rsi), %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: xorb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x32,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i8, ptr %b %xor = xor i8 %a, %t @@ -57,8 +57,8 @@ entry: define i16 @xor16rm(i16 noundef %a, ptr %b) { ; CHECK-LABEL: xor16rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorw (%rsi), %di, %ax -; CHECK-NEXT: retq +; CHECK-NEXT: xorw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x33,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i16, ptr %b %xor = xor i16 %a, %t @@ -68,8 +68,8 @@ entry: define i32 @xor32rm(i32 noundef %a, ptr %b) { ; CHECK-LABEL: xor32rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl (%rsi), %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x33,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i32, ptr %b %xor = xor i32 %a, %t @@ -79,8 +79,8 @@ entry: define i64 @xor64rm(i64 noundef %a, ptr %b) { ; CHECK-LABEL: xor64rm: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq (%rsi), %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x33,0x3e] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t = load i64, ptr %b %xor = xor i64 %a, %t @@ -90,9 +90,9 @@ entry: define i16 @xor16ri8(i16 noundef %a) { ; CHECK-LABEL: xor16ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl $123, %edi, %eax +; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i16 %a, 123 ret i16 %xor @@ -101,8 +101,8 @@ entry: define i32 @xor32ri8(i32 noundef %a) { ; CHECK-LABEL: xor32ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl $123, %edi, %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i32 %a, 123 ret i32 %xor @@ -111,8 +111,8 @@ entry: define i64 @xor64ri8(i64 noundef %a) { ; CHECK-LABEL: xor64ri8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq $123, %rdi, %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i64 %a, 123 ret i64 %xor @@ -121,8 +121,8 @@ entry: define i8 @xor8ri(i8 noundef %a) { ; CHECK-LABEL: xor8ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorb $123, %dil, %al -; CHECK-NEXT: retq +; CHECK-NEXT: xorb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xf7,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i8 %a, 123 ret i8 %xor @@ -131,9 +131,10 @@ entry: define i16 @xor16ri(i16 noundef %a) { ; CHECK-LABEL: xor16ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl $1234, %edi, %eax # imm = 0x4D2 +; CHECK-NEXT: xorl $1234, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xf7,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i16 %a, 1234 ret i16 %xor @@ -142,8 +143,9 @@ entry: define i32 @xor32ri(i32 noundef %a) { ; CHECK-LABEL: xor32ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl $123456, %edi, %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: xorl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i32 %a, 123456 ret i32 %xor @@ -152,8 +154,9 @@ entry: define i64 @xor64ri(i64 noundef %a) { ; CHECK-LABEL: xor64ri: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq $123456, %rdi, %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: xorq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %xor = xor i64 %a, 123456 ret i64 %xor @@ -162,8 +165,8 @@ entry: define i8 @xor8mr(ptr %a, i8 noundef %b) { ; CHECK-LABEL: xor8mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorb %sil, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: xorb %sil, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x30,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %xor = xor i8 %t, %b @@ -173,8 +176,8 @@ entry: define i16 @xor16mr(ptr %a, i16 noundef %b) { ; CHECK-LABEL: xor16mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorw %si, (%rdi), %ax -; CHECK-NEXT: retq +; CHECK-NEXT: xorw %si, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x31,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %xor = xor i16 %t, %b @@ -184,8 +187,8 @@ entry: define i32 @xor32mr(ptr %a, i32 noundef %b) { ; CHECK-LABEL: xor32mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %esi, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %esi, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %xor = xor i32 %t, %b @@ -195,8 +198,8 @@ entry: define i64 @xor64mr(ptr %a, i64 noundef %b) { ; CHECK-LABEL: xor64mr: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq %rsi, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorq %rsi, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x31,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %xor = xor i64 %t, %b @@ -206,10 +209,10 @@ entry: define i16 @xor16mi8(ptr %a) { ; CHECK-LABEL: xor16mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: xorl $123, %eax +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: xorl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xf0,0x7b] ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %xor = xor i16 %t, 123 @@ -219,8 +222,8 @@ entry: define i32 @xor32mi8(ptr %a) { ; CHECK-LABEL: xor32mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl $123, (%rdi), %eax -; CHECK-NEXT: retq +; CHECK-NEXT: xorl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x37,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %xor = xor i32 %t, 123 @@ -230,8 +233,8 @@ entry: define i64 @xor64mi8(ptr %a) { ; CHECK-LABEL: xor64mi8: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq $123, (%rdi), %rax -; CHECK-NEXT: retq +; CHECK-NEXT: xorq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x37,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %xor = xor i64 %t, 123 @@ -241,8 +244,8 @@ entry: define i8 @xor8mi(ptr %a) { ; CHECK-LABEL: xor8mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorb $123, (%rdi), %al -; CHECK-NEXT: retq +; CHECK-NEXT: xorb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x37,0x7b] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %xor = xor i8 %t, 123 @@ -252,10 +255,11 @@ entry: define i16 @xor16mi(ptr %a) { ; CHECK-LABEL: xor16mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: movzwl (%rdi), %eax -; CHECK-NEXT: xorl $1234, %eax # imm = 0x4D2 +; CHECK-NEXT: movzwl (%rdi), %eax # encoding: [0x0f,0xb7,0x07] +; CHECK-NEXT: xorl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x35,0xd2,0x04,0x00,0x00] +; CHECK-NEXT: # imm = 0x4D2 ; CHECK-NEXT: # kill: def $ax killed $ax killed $eax -; CHECK-NEXT: retq +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %xor = xor i16 %t, 1234 @@ -265,8 +269,9 @@ entry: define i32 @xor32mi(ptr %a) { ; CHECK-LABEL: xor32mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl $123456, (%rdi), %eax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: xorl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x37,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %xor = xor i32 %t, 123456 @@ -276,8 +281,9 @@ entry: define i64 @xor64mi(ptr %a) { ; CHECK-LABEL: xor64mi: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq $123456, (%rdi), %rax # imm = 0x1E240 -; CHECK-NEXT: retq +; CHECK-NEXT: xorq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x37,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %xor = xor i64 %t, 123456 @@ -289,11 +295,12 @@ entry: define i1 @xorflag8rr(i8 %a, i8 %b) { ; CHECK-LABEL: xorflag8rr: ; CHECK: # %bb.0: -; CHECK-NEXT: xorl %edi, %esi, %eax -; CHECK-NEXT: xorb $-1, %al, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %edi, %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xfe] +; CHECK-NEXT: xorb $-1, %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xf0,0xff] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i8 %b, -1 %v0 = xor i8 %a, %xor ; 0xff << 50 %v1 = icmp eq i8 %v0, 0 @@ -304,11 +311,12 @@ define i1 @xorflag8rr(i8 %a, i8 %b) { define i1 @xorflag16rr(i16 %a, i16 %b) { ; CHECK-LABEL: xorflag16rr: ; CHECK: # %bb.0: -; CHECK-NEXT: xorl %edi, %esi, %eax -; CHECK-NEXT: xorw $-1, %ax, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %edi, %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xfe] +; CHECK-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf0,0xff,0xff] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 %b, -1 %v0 = xor i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -319,10 +327,11 @@ define i1 @xorflag16rr(i16 %a, i16 %b) { define i1 @xorflag32rr(i32 %a, i32 %b) { ; CHECK-LABEL: xorflag32rr: ; CHECK: # %bb.0: -; CHECK-NEXT: xorl %esi, %edi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x31,0xf7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = xor i32 %a, %b ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -332,10 +341,11 @@ define i1 @xorflag32rr(i32 %a, i32 %b) { define i1 @xorflag64rr(i64 %a, i64 %b) { ; CHECK-LABEL: xorflag64rr: ; CHECK: # %bb.0: -; CHECK-NEXT: xorq %rsi, %rdi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x31,0xf7] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = xor i64 %a, %b ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -345,11 +355,12 @@ define i1 @xorflag64rr(i64 %a, i64 %b) { define i1 @xorflag8rm(ptr %ptr, i8 %b) { ; CHECK-LABEL: xorflag8rm: ; CHECK: # %bb.0: -; CHECK-NEXT: xorb (%rdi), %sil, %al -; CHECK-NEXT: xorb $-1, %al, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorb (%rdi), %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x32,0x37] +; CHECK-NEXT: xorb $-1, %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xf0,0xff] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i8, ptr %ptr %xor = xor i8 %b, -1 %v0 = xor i8 %a, %xor ; 0xff << 50 @@ -361,11 +372,12 @@ define i1 @xorflag8rm(ptr %ptr, i8 %b) { define i1 @xorflag16rm(ptr %ptr, i16 %b) { ; CHECK-LABEL: xorflag16rm: ; CHECK: # %bb.0: -; CHECK-NEXT: xorw (%rdi), %si, %ax -; CHECK-NEXT: xorw $-1, %ax, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorw (%rdi), %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x33,0x37] +; CHECK-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf0,0xff,0xff] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i16, ptr %ptr %xor = xor i16 %b, -1 %v0 = xor i16 %a, %xor ; 0xff << 50 @@ -377,10 +389,11 @@ define i1 @xorflag16rm(ptr %ptr, i16 %b) { define i1 @xorflag32rm(ptr %ptr, i32 %b) { ; CHECK-LABEL: xorflag32rm: ; CHECK: # %bb.0: -; CHECK-NEXT: xorl (%rdi), %esi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorl (%rdi), %esi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x33,0x37] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i32, ptr %ptr %v0 = xor i32 %a, %b ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 @@ -391,10 +404,11 @@ define i1 @xorflag32rm(ptr %ptr, i32 %b) { define i1 @xorflag64rm(ptr %ptr, i64 %b) { ; CHECK-LABEL: xorflag64rm: ; CHECK: # %bb.0: -; CHECK-NEXT: xorq (%rdi), %rsi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorq (%rdi), %rsi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x33,0x37] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %a = load i64, ptr %ptr %v0 = xor i64 %a, %b ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 @@ -405,10 +419,11 @@ define i1 @xorflag64rm(ptr %ptr, i64 %b) { define i1 @xorflag8ri(i8 %a) { ; CHECK-LABEL: xorflag8ri: ; CHECK: # %bb.0: -; CHECK-NEXT: xorb $-124, %dil, %cl -; CHECK-NEXT: sete %al -; CHECK-NEXT: movb %cl, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xf7,0x84] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i8 123, -1 %v0 = xor i8 %a, %xor ; 0xff << 50 %v1 = icmp eq i8 %v0, 0 @@ -419,10 +434,12 @@ define i1 @xorflag8ri(i8 %a) { define i1 @xorflag16ri(i16 %a) { ; CHECK-LABEL: xorflag16ri: ; CHECK: # %bb.0: -; CHECK-NEXT: xorw $-1235, %di, %cx # imm = 0xFB2D -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf7,0x2d,0xfb] +; CHECK-NEXT: # imm = 0xFB2D +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 1234, -1 %v0 = xor i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -433,10 +450,12 @@ define i1 @xorflag16ri(i16 %a) { define i1 @xorflag32ri(i32 %a) { ; CHECK-LABEL: xorflag32ri: ; CHECK: # %bb.0: -; CHECK-NEXT: xorl $123456, %edi, %ecx # imm = 0x1E240 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = xor i32 %a, 123456 ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -446,10 +465,12 @@ define i1 @xorflag32ri(i32 %a) { define i1 @xorflag64ri(i64 %a) { ; CHECK-LABEL: xorflag64ri: ; CHECK: # %bb.0: -; CHECK-NEXT: xorq $123456, %rdi, %rcx # imm = 0x1E240 -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xf7,0x40,0xe2,0x01,0x00] +; CHECK-NEXT: # imm = 0x1E240 +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = xor i64 %a, 123456 ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -459,10 +480,11 @@ define i1 @xorflag64ri(i64 %a) { define i1 @xorflag16ri8(i16 %a) { ; CHECK-LABEL: xorflag16ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: xorw $-124, %di, %cx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movw %cx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf7,0x84,0xff] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %xor = xor i16 123, -1 %v0 = xor i16 %a, %xor ; 0xff << 50 %v1 = icmp eq i16 %v0, 0 @@ -473,10 +495,11 @@ define i1 @xorflag16ri8(i16 %a) { define i1 @xorflag32ri8(i32 %a) { ; CHECK-LABEL: xorflag32ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: xorl $123, %edi, %ecx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movl %ecx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = xor i32 %a, 123 ; 0xff << 50 %v1 = icmp eq i32 %v0, 0 store i32 %v0, ptr @d64 @@ -486,10 +509,11 @@ define i1 @xorflag32ri8(i32 %a) { define i1 @xorflag64ri8(i64 %a) { ; CHECK-LABEL: xorflag64ri8: ; CHECK: # %bb.0: -; CHECK-NEXT: xorq $123, %rdi, %rcx -; CHECK-NEXT: sete %al -; CHECK-NEXT: movq %rcx, d64(%rip) -; CHECK-NEXT: retq +; CHECK-NEXT: xorq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A] +; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte +; CHECK-NEXT: retq # encoding: [0xc3] %v0 = xor i64 %a, 123 ; 0xff << 50 %v1 = icmp eq i64 %v0, 0 store i64 %v0, ptr @d64 @@ -499,8 +523,8 @@ define i1 @xorflag64ri8(i64 %a) { define void @xor8mr_legacy(ptr %a, i8 noundef %b) { ; CHECK-LABEL: xor8mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorb %sil, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: xorb %sil, (%rdi) # encoding: [0x40,0x30,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i8, ptr %a %xor = xor i8 %t, %b @@ -511,8 +535,8 @@ entry: define void @xor16mr_legacy(ptr %a, i16 noundef %b) { ; CHECK-LABEL: xor16mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorw %si, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: xorw %si, (%rdi) # encoding: [0x66,0x31,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i16, ptr %a %xor = xor i16 %t, %b @@ -523,8 +547,8 @@ entry: define void @xor32mr_legacy(ptr %a, i32 noundef %b) { ; CHECK-LABEL: xor32mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorl %esi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: xorl %esi, (%rdi) # encoding: [0x31,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i32, ptr %a %xor = xor i32 %t, %b @@ -535,8 +559,8 @@ entry: define void @xor64mr_legacy(ptr %a, i64 noundef %b) { ; CHECK-LABEL: xor64mr_legacy: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: xorq %rsi, (%rdi) -; CHECK-NEXT: retq +; CHECK-NEXT: xorq %rsi, (%rdi) # encoding: [0x48,0x31,0x37] +; CHECK-NEXT: retq # encoding: [0xc3] entry: %t= load i64, ptr %a %xor = xor i64 %t, %b diff --git a/llvm/utils/release/github-upload-release.py b/llvm/utils/release/github-upload-release.py index f1ad78120a0a..a8bb569d2fc9 100755 --- a/llvm/utils/release/github-upload-release.py +++ b/llvm/utils/release/github-upload-release.py @@ -30,8 +30,10 @@ import argparse import github +import sys from textwrap import dedent + def create_release(repo, release, tag=None, name=None, message=None): if not tag: tag = "llvmorg-{}".format(release) @@ -67,22 +69,36 @@ def upload_files(repo, release, files): parser = argparse.ArgumentParser() -parser.add_argument("command", type=str, choices=["create", "upload"]) +parser.add_argument( + "command", type=str, choices=["create", "upload", "check-permissions"] +) # All args parser.add_argument("--token", type=str) parser.add_argument("--release", type=str) +parser.add_argument("--user", type=str) # Upload args parser.add_argument("--files", nargs="+", type=str) - args = parser.parse_args() github = github.Github(args.token) -llvm_repo = github.get_organization("llvm").get_repo("llvm-project") +llvm_org = github.get_organization("llvm") +llvm_repo = llvm_org.get_repo("llvm-project") + +if args.user: + # Validate that this user is allowed to modify releases. + user = github.get_user(args.user) + team = llvm_org.get_team_by_slug("llvm-release-managers") + if not team.has_in_members(user): + print("User {} is not a allowed to modify releases".format(args.user)) + sys.exit(1) +elif args.command == "check-permissions": + print("--user option required for check-permissions") + sys.exit(1) if args.command == "create": - create_release(llvm_repo, args.release) + create_release(llvm_repo, args.release, args.user) if args.command == "upload": upload_files(llvm_repo, args.release, args.files) |