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authorDenis Shienkov <denis.shienkov@gmail.com>2020-05-18 13:17:05 +0300
committerDenis Shienkov <denis.shienkov@gmail.com>2020-05-19 11:13:51 +0000
commit272a83e2a2ee96e8866663fe8c06dfe455dfc7c2 (patch)
tree6ec4c7d1eb10ef3527eb282ab5768097f4e49c4b
parent39c2b0aad7b6b27ffa90341bda0f291afd5c37bf (diff)
doc: Add mention about new supported Renesas M32C architecture
Change-Id: Idbae1dcc9223bbc975c7139d1d3f994dc66a4ea4 Reviewed-by: Leena Miettinen <riitta-leena.miettinen@qt.io> Reviewed-by: Ivan Komissarov <ABBAPOH@gmail.com> Reviewed-by: Christian Kandeler <christian.kandeler@qt.io>
-rw-r--r--doc/reference/modules/qbs-module.qdoc4
1 files changed, 4 insertions, 0 deletions
diff --git a/doc/reference/modules/qbs-module.qdoc b/doc/reference/modules/qbs-module.qdoc
index 69d852298..819d1a482 100644
--- a/doc/reference/modules/qbs-module.qdoc
+++ b/doc/reference/modules/qbs-module.qdoc
@@ -331,6 +331,10 @@
\li 64-bit ISA architecture of the Itanium family processors
developed by Intel
\row
+ \li \c{"m32c"}
+ \li 32- and 16-bit CISC microcontrollers featuring high ROM code
+ efficiency manufactured by Renesas Electronics
+ \row
\li \c{"m68k"}
\li 16- and 32-bit CISC microprocessor, developed by Motorola
Semiconductor Products Sector, and further improved as ColdFire