From 6845a8f9cadae8c5bcb1bb3e62af720b12437b3d Mon Sep 17 00:00:00 2001
From: Denis Shienkov <denis.shienkov@gmail.com>
Date: Fri, 12 Jul 2019 16:14:11 +0300
Subject: Fix compilation errors with MSVC2015

... this regression was introduced in commit
808d246607b768ea4dc02e3ef0b178e058d6575c

Change-Id: I8b4ea97060d99d4ef39aac8c05bdb438d50d1cc1
Reviewed-by: Ivan Komissarov <ABBAPOH@gmail.com>
Reviewed-by: Christian Kandeler <christian.kandeler@qt.io>
---
 .../generator/iarew/archs/arm/armgeneralsettingsgroup_v8.cpp | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/plugins/generator/iarew/archs/arm/armgeneralsettingsgroup_v8.cpp b/src/plugins/generator/iarew/archs/arm/armgeneralsettingsgroup_v8.cpp
index b7c919391..a281af6cb 100644
--- a/src/plugins/generator/iarew/archs/arm/armgeneralsettingsgroup_v8.cpp
+++ b/src/plugins/generator/iarew/archs/arm/armgeneralsettingsgroup_v8.cpp
@@ -91,6 +91,11 @@ struct CpuCoreEntry final
                        CortexM23 = 58,
                        CortexM33 = 59 };
 
+    // Required to compile in MSVC2015.
+    CpuCoreEntry(CpuCoreCode cc, QByteArray tf)
+        : coreCode(cc), targetFlag(std::move(tf))
+    {}
+
     CpuCoreCode coreCode = Arm7tdmi;
     QByteArray targetFlag;
 };
@@ -162,6 +167,13 @@ struct FpuCoreEntry final
                        Vfp5d16 = 7,
                        Vfp9s = 8 };
 
+
+    // Required to compile in MSVC2015.
+    FpuCoreEntry(FpuCoreCode cc, FpuRegistersCount rc,
+                 QByteArray tf)
+        : coreCode(cc), regsCount(rc), targetFlag(std::move(tf))
+    {}
+
     FpuCoreCode coreCode = NoVfp;
     FpuRegistersCount regsCount = NoFpuRegisters;
     QByteArray targetFlag;
-- 
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