diff options
| author | Jim Wilson <jimw@sifive.com> | 2018-12-27 15:25:49 -0800 |
|---|---|---|
| committer | Mark Wielaard <mark@klomp.org> | 2019-01-08 23:52:11 +0100 |
| commit | 1dabad36ee28aa76b8cf14b6426b379cabee6def (patch) | |
| tree | 5c45a0f2dbd30e53a288b2d31c7fa14aa73a2299 /backends | |
| parent | e8b9832af19e5975fb2a9dbe729eaba0373c781f (diff) | |
RISC-V: Improve riscv64 core file support.
This fixes two problems. The offset for x1 is changed from 1 to 8 because
this is a byte offset not a register skip count. Support for reading the
PC value is added. This requires changing the testsuite to match the new
readelf output for coredumps.
Signed-off-by: Jim Wilson <jimw@sifive.com>
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/ChangeLog | 5 | ||||
| -rw-r--r-- | backends/riscv_corenote.c | 9 |
2 files changed, 13 insertions, 1 deletions
diff --git a/backends/ChangeLog b/backends/ChangeLog index e2a02812..c8234072 100644 --- a/backends/ChangeLog +++ b/backends/ChangeLog @@ -1,3 +1,8 @@ +2018-12-27 Jim Wilson <jimw@sifive.com> + + * riscv_corenote.c (prstatus_regs): Change offset from 1 to 8. + (PRSTATUS_REGSET_ITEMS): New. + 2018-11-06 Mark Wielaard <mark@klomp.org> * x86_64_symbol.c (x86_64_section_type_name): New function. diff --git a/backends/riscv_corenote.c b/backends/riscv_corenote.c index 37cce7e3..afb84bee 100644 --- a/backends/riscv_corenote.c +++ b/backends/riscv_corenote.c @@ -53,8 +53,15 @@ static const Ebl_Register_Location prstatus_regs[] = { - { .offset = 1, .regno = 1, .count = 31, .bits = 64 } /* x1..x31 */ + { .offset = 8, .regno = 1, .count = 31, .bits = 64 } /* x1..x31 */ }; #define PRSTATUS_REGS_SIZE (32 * 8) +#define PRSTATUS_REGSET_ITEMS \ + { \ + .name = "pc", .type = ELF_T_ADDR, .format = 'x', \ + .offset = offsetof (struct EBLHOOK(prstatus), pr_reg[0]), \ + .group = "register", .pc_register = true \ + } + #include "linux-core-note.c" |