diff options
| author | Thiago Macieira <thiago.macieira@intel.com> | 2018-06-20 20:28:01 -0700 |
|---|---|---|
| committer | Thiago Macieira <thiago.macieira@intel.com> | 2018-06-25 18:49:33 +0000 |
| commit | 2cf5c5a602af5603c9d8320aeaa1454733650e2a (patch) | |
| tree | 76f25ffa104e9ac77a2475d86a0ae80131038026 /config.tests/arch | |
| parent | f6d9cc5b79d545be0c64ff6fd85131a89ee21edd (diff) | |
SIMD: Remove unused (and unlikely to be ever used) AVX-512 profiles
"AVX512MIC" (Many Integrated Cores) is the set of AVX-512 features found
on the Intel Xeon Phi coprocessors (codename "Knights Landing"), which
is an unlikely architecture for Qt to run on.
The two profiles with VL came from study of early GCC code and are no
longer applicable. GCC source code now shows both VBMI and IFMA as part
of the -march=cannonlake feature set.
Change-Id: Iff4151c519c144d580c4fffd153a0f268919fe2c
Reviewed-by: Lars Knoll <lars.knoll@qt.io>
Diffstat (limited to 'config.tests/arch')
| -rw-r--r-- | config.tests/arch/arch.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/config.tests/arch/arch.cpp b/config.tests/arch/arch.cpp index 2be3630af8..2ccfe127b5 100644 --- a/config.tests/arch/arch.cpp +++ b/config.tests/arch/arch.cpp @@ -80,19 +80,19 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:" " avx2" #endif #ifdef __AVX512F__ -// AVX512 Foundation, Intel Xeon Phi codename "Knights Landing" and Intel Xeon codename "Skylake" +// AVX512 Foundation, Intel Xeon Scalable ("Skylake" server), some Intel Core 7th generation ("Skylake") " avx512f" #endif #ifdef __AVX512CD__ -// AVX512 Conflict Detection, Intel Xeon Phi codename "Knights Landing" and Intel Xeon codename "Skylake" +// AVX512 Conflict Detection, Intel Xeon Scalable ("Skylake" server), some Intel Core 7th generation ("Skylake") " avx512cd" #endif #ifdef __AVX512DQ__ -// AVX512 Double & Quadword, Intel Xeon processor codename "Skylake" +// AVX512 Double & Quadword, Intel Xeon Scalable ("Skylake" server), some Intel Core 7th generation ("Skylake") " avx512dq" #endif #ifdef __AVX512BW__ -// AVX512 Byte & Word, Intel Xeon processor codename "Skylake" +// AVX512 Byte & Word, Intel Xeon Scalable ("Skylake" server), some Intel Core 7th generation ("Skylake") " avx512bw" #endif #ifdef __AVX512ER__ @@ -104,7 +104,7 @@ const char msg2[] = "==Qt=magic=Qt== Sub-architecture:" " avx512pf" #endif #ifdef __AVX512VL__ -// AVX512 Vector Length, Intel Xeon processor codename "Skylake" +// AVX512 Vector Length, Intel Xeon Scalable ("Skylake" server), some Intel Core 7th generation ("Skylake") " avx512vl" #endif #ifdef __AVX512IFMA__ |