diff options
| author | Pino Toscano <toscano.pino@tiscali.it> | 2014-12-27 17:54:47 +0100 |
|---|---|---|
| committer | Pino Toscano <toscano.pino@tiscali.it> | 2014-12-30 20:21:56 +0100 |
| commit | 7ec14ae0b267780d6bfa5c7453c906caeee3bc00 (patch) | |
| tree | 21a60c76d78479f5a4b7fa2c2f42ac64a5bdd3f5 /src/corelib/arch/qatomic_mips.h | |
| parent | 442eee3cdab67300f96547bc4d6897391b7becd8 (diff) | |
Complete MIPS atomic support on pre-MIPS32 architectures
Extend the support for pre-MIPS32 architectures (done mostly in
60b6b28c213a420ee40e254ff1823876098e0a04) also to orderedMemoryFence.
Change-Id: I50b9091c16166b8434a07988053c1f901d528237
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'src/corelib/arch/qatomic_mips.h')
| -rw-r--r-- | src/corelib/arch/qatomic_mips.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/corelib/arch/qatomic_mips.h b/src/corelib/arch/qatomic_mips.h index b8a9665f86..b99c70f0c8 100644 --- a/src/corelib/arch/qatomic_mips.h +++ b/src/corelib/arch/qatomic_mips.h @@ -120,7 +120,10 @@ void QBasicAtomicOps<size>::releaseMemoryFence(const T &) Q_DECL_NOTHROW template <int size> template <typename T> inline void QBasicAtomicOps<size>::orderedMemoryFence(const T &) Q_DECL_NOTHROW { - asm volatile ("sync 0" ::: "memory"); + asm volatile (".set push\n" + ".set mips32\n" + "sync 0\n" + ".set pop\n" ::: "memory"); } template<> template<typename T> inline |