diff options
| author | Lars Knoll <lars.knoll@qt.io> | 2020-02-13 19:15:32 +0100 |
|---|---|---|
| committer | Lars Knoll <lars.knoll@qt.io> | 2020-03-26 09:15:37 +0100 |
| commit | f2208c59e70333cecf613390917a104f7c1f110b (patch) | |
| tree | 41eb92aca17942db5ad95f10e4218c90d4e46421 /src/corelib/global/qsimd_p.h | |
| parent | f2f32b88b873b8b18cc1b9e1f66135e6d09b9286 (diff) | |
Add a public qsimd.h header
This header only covers a part of what qsimd_p.h does, namely
the compile time detection of simd extensions.
Change-Id: I05f1d987f194a5bec335f2405cc2846fbaa88b66
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'src/corelib/global/qsimd_p.h')
| -rw-r--r-- | src/corelib/global/qsimd_p.h | 21 |
1 files changed, 1 insertions, 20 deletions
diff --git a/src/corelib/global/qsimd_p.h b/src/corelib/global/qsimd_p.h index 26e98c4542..2f2d49348f 100644 --- a/src/corelib/global/qsimd_p.h +++ b/src/corelib/global/qsimd_p.h @@ -53,6 +53,7 @@ // #include <QtCore/private/qglobal_p.h> +#include <QtCore/qsimd.h> /* * qt_module_config.prf defines the QT_COMPILER_SUPPORTS_XXX macros. @@ -183,12 +184,6 @@ # if defined(Q_CC_MSVC) && (defined(_M_X64) || _M_IX86_FP >= 2) // MSVC doesn't define __SSE2__, so do it ourselves # define __SSE__ 1 -# define __SSE2__ 1 -# endif - -# ifdef __SSE2__ -// #include the intrinsics -# include <immintrin.h> # endif # if defined(Q_CC_GNU) && !defined(Q_CC_INTEL) @@ -196,19 +191,6 @@ # include <x86intrin.h> # endif -# if defined(Q_CC_MSVC) && (defined(_M_AVX) || defined(__AVX__)) -// Visual Studio defines __AVX__ when /arch:AVX is passed, but not the earlier macros -// See: https://msdn.microsoft.com/en-us/library/b0084kay.aspx -# define __SSE3__ 1 -# define __SSSE3__ 1 -// no Intel CPU supports SSE4a, so don't define it -# define __SSE4_1__ 1 -# define __SSE4_2__ 1 -# ifndef __AVX__ -# define __AVX__ 1 -# endif -# endif - # if defined(__SSE4_2__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC)) // POPCNT instructions: // All processors that support SSE4.2 support POPCNT @@ -287,7 +269,6 @@ QT_END_NAMESPACE // NEON intrinsics // note: as of GCC 4.9, does not support function targets for ARM #if defined(__ARM_NEON) || defined(__ARM_NEON__) -#include <arm_neon.h> #define QT_FUNCTION_TARGET_STRING_NEON "+neon" // unused: gcc doesn't support function targets on non-aarch64, and on Aarch64 NEON is always available. #ifndef __ARM_NEON__ // __ARM_NEON__ is not defined on AArch64, but we need it in our NEON detection. |