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authorThiago Macieira <thiago@kde.org>2011-07-31 19:22:18 -0300
committerQt by Nokia <qt-info@nokia.com>2012-01-28 16:54:05 +0100
commit2bbd2262b3974fb4e39341a23e40ffdf1655ebe9 (patch)
tree7f920173e7ab4665ecbf2a1841abf3e7175d4bc0 /src/corelib/thread
parent273715fc9becb54996e28fda5ea5fb1624d571a2 (diff)
Add a set of atomics based on GCC intrinsics
With this implementation, we can have Qt run on any architecture that GCC supports without having to write specialised code. However, on some architectures, the code that GCC generates is not optimal: it uses locking on ARMv5 and it's always fully-ordered. For that reason, it appears after the Qt native assembly implementations (it's a fallback, not an override). Since they all have fully-ordered memory semantics, we define only the xxxRelaxed functions. The exception is __sync_lock_and_test, which has acquire semantics, so we need to define the Release and Ordered versions too. On some architectures, GCC can support atomics on types different than 32-bit and pointer-sized (like x86, x86-64, ARM and even MIPS). However, there's no standardised way of telling: GCC seems to define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8} if those operations are present, but I couldn't find it on the ARM compiler (it was there for i386, x86-64, IA-64 and MIPS). Change-Id: I55ff7a7c0cfc6388b7ad8e2c0dedecffdf2a3e01 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
Diffstat (limited to 'src/corelib/thread')
-rw-r--r--src/corelib/thread/qbasicatomic.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/corelib/thread/qbasicatomic.h b/src/corelib/thread/qbasicatomic.h
index a9a3fe92c6..18febd36de 100644
--- a/src/corelib/thread/qbasicatomic.h
+++ b/src/corelib/thread/qbasicatomic.h
@@ -58,6 +58,8 @@
# include "QtCore/qatomic_mips.h"
#elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64)
# include <QtCore/qatomic_x86_64.h>
+#elif defined(Q_CC_GNU)
+# include <QtCore/qatomic_gcc.h>
#else
# define QT_OLD_ATOMICS
#endif