diff options
author | Erik Verbruggen <erik.verbruggen@theqtcompany.com> | 2015-12-11 13:04:46 +0100 |
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committer | Erik Verbruggen <erik.verbruggen@theqtcompany.com> | 2016-01-13 09:05:01 +0000 |
commit | 4417458d62d1f75927b9f2e807e8843a49b01aa7 (patch) | |
tree | bf635d632614ca7938c6cdf2d2541601eef4bb77 /src/corelib/tools/qsimd.cpp | |
parent | 9a969182cfa452fdb305bc9fe0becc6b358f91c1 (diff) |
ARMv8: add crc32 feature detection.
Change-Id: I3cfac90dfa137d0bf3d124d87262eb2dbb56459c
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'src/corelib/tools/qsimd.cpp')
-rw-r--r-- | src/corelib/tools/qsimd.cpp | 46 |
1 files changed, 41 insertions, 5 deletions
diff --git a/src/corelib/tools/qsimd.cpp b/src/corelib/tools/qsimd.cpp index 171e87df05..ef4ce741aa 100644 --- a/src/corelib/tools/qsimd.cpp +++ b/src/corelib/tools/qsimd.cpp @@ -65,8 +65,15 @@ #define HWCAP_VFPv3 8192 #define HWCAP_VFPv3D16 16384 +// copied from <asm/hwcap.h> (ARM): +#define HWCAP2_CRC32 (1 << 4) + +// copied from <asm/hwcap.h> (Aarch64) +#define HWCAP_CRC32 (1 << 7) + // copied from <linux/auxvec.h> #define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ +#define AT_HWCAP2 26 /* extension of AT_HWCAP */ #elif defined(Q_CC_GHS) #include <INTEGRITY_types.h> @@ -103,7 +110,16 @@ static inline quint64 detectProcessorFeatures() { quint64 features = 0; -#if defined(Q_OS_LINUX) +#if defined(Q_OS_IOS) + features |= Q_UINT64_C(1) << CpuFeatureNEON; // On iOS, NEON is always available. +# ifdef Q_PROCESSOR_ARM_V8 + features |= Q_UINT64_C(1) << CpuFeatureCRC32; // On iOS, crc32 is always available if the architecture is Aarch32/64. +# endif + return features; +#elif defined(Q_OS_LINUX) +# if defined(Q_PROCESSOR_ARM_V8) && defined(Q_PROCESSOR_ARM_64) + features |= Q_UINT64_C(1) << CpuFeatureNEON; // NEON is always available on ARMv8 64bit. +# endif int auxv = qt_safe_open("/proc/self/auxv", O_RDONLY); if (auxv != -1) { unsigned long vector[64]; @@ -116,12 +132,25 @@ static inline quint64 detectProcessorFeatures() } int max = nread / (sizeof vector[0]); - for (int i = 0; i < max; i += 2) + for (int i = 0; i < max; i += 2) { if (vector[i] == AT_HWCAP) { +# if defined(Q_PROCESSOR_ARM_V8) && defined(Q_PROCESSOR_ARM_64) + // For Aarch64: + if (vector[i+1] & HWCAP_CRC32) + features |= Q_UINT64_C(1) << CpuFeatureCRC32; +# endif + // Aarch32, or ARMv7 or before: if (vector[i+1] & HWCAP_NEON) features |= Q_UINT64_C(1) << CpuFeatureNEON; - break; } +# if defined(Q_PROCESSOR_ARM_32) + // For Aarch32: + if (vector[i] == AT_HWCAP2) { + if (vector[i+1] & HWCAP2_CRC32) + features |= Q_UINT64_C(1) << CpuFeatureCRC32; + } +# endif + } } qt_safe_close(auxv); @@ -133,6 +162,9 @@ static inline quint64 detectProcessorFeatures() #if defined(__ARM_NEON__) features = Q_UINT64_C(1) << CpuFeatureNEON; #endif +#if defined(__ARM_FEATURE_CRC32) + features = Q_UINT64_C(1) << CpuFeatureCRC32; +#endif return features; } @@ -498,9 +530,13 @@ static inline uint detectProcessorFeatures() #if defined(Q_PROCESSOR_ARM) /* Data: neon + crc32 */ -static const char features_string[] = " neon\0"; -static const int features_indices[] = { 0 }; +static const char features_string[] = + " neon\0" + " crc32\0" + "\0"; +static const int features_indices[] = { 0, 6 }; #elif defined(Q_PROCESSOR_MIPS) /* Data: dsp |