diff options
| author | Thiago Macieira <thiago.macieira@intel.com> | 2012-04-22 16:05:31 +0200 |
|---|---|---|
| committer | Qt by Nokia <qt-info@nokia.com> | 2012-04-25 14:58:36 +0200 |
| commit | 105b2312145e8868f5357d9e7ba78a9cddcfee64 (patch) | |
| tree | 7bda6f583d2c30ae7c6ab8baa774ee7d2caa98ea /src/corelib/tools/qsimd_p.h | |
| parent | e75b0e8c72008f800704828cd4f1eae97b523848 (diff) | |
Add detection code for AVX2, HLE, RTM and AES to qsimd.cpp
AES is currently not enabled, since we don't use it for anything. The
code is here with the proper detection should we want to in the
future.
RTM and HLE (Transactional Memory Extensions) I'll use soon in the
locking code.
Also rename a few variables to make it easier to read later on.
Change-Id: I800c66d7e1ba86ec037692928d94f53ea5d5868f
Reviewed-by: Bradley T. Hughes <bradley.hughes@nokia.com>
Reviewed-by: Samuel Rødal <samuel.rodal@nokia.com>
Diffstat (limited to 'src/corelib/tools/qsimd_p.h')
| -rw-r--r-- | src/corelib/tools/qsimd_p.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/corelib/tools/qsimd_p.h b/src/corelib/tools/qsimd_p.h index 88ac7597e2..6374e20135 100644 --- a/src/corelib/tools/qsimd_p.h +++ b/src/corelib/tools/qsimd_p.h @@ -129,7 +129,10 @@ enum CPUFeatures { SSSE3 = 0x10, SSE4_1 = 0x20, SSE4_2 = 0x40, - AVX = 0x80 + AVX = 0x80, + AVX2 = 0x100, + HLE = 0x200, + RTM = 0x400 }; Q_CORE_EXPORT uint qDetectCPUFeatures(); |