diff options
author | Allan Sandfeld Jensen <allan.jensen@qt.io> | 2021-04-19 17:01:05 +0200 |
---|---|---|
committer | Qt Cherry-pick Bot <cherrypick_bot@qt-project.org> | 2021-04-20 00:32:41 +0000 |
commit | a7b9a9328e783f1f6033a4e8afacf3f91b8bba22 (patch) | |
tree | b0ebddff1b3ef100ecf0fcbaf8a2fe7789cede16 /src/corelib | |
parent | cbec5527903a6ee8fc711b1a352dc17b6efada71 (diff) |
Fix ARM and MIPS runtime CPU feature flags
The set values didn't match tested values, as the enum were already
on flag form.
Change-Id: I9e8b0d419682122e8d40cd47bd68d840386c2066
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
(cherry picked from commit ccd17fbc57fae0cb2e5c020e00706edc856b13df)
Reviewed-by: Qt Cherry-pick Bot <cherrypick_bot@qt-project.org>
Diffstat (limited to 'src/corelib')
-rw-r--r-- | src/corelib/global/qsimd.cpp | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/corelib/global/qsimd.cpp b/src/corelib/global/qsimd.cpp index c2db117853..13b35aa8a7 100644 --- a/src/corelib/global/qsimd.cpp +++ b/src/corelib/global/qsimd.cpp @@ -132,7 +132,7 @@ static inline quint64 detectProcessorFeatures() #if defined(Q_OS_LINUX) # if defined(Q_PROCESSOR_ARM_V8) && defined(Q_PROCESSOR_ARM_64) - features |= Q_UINT64_C(1) << CpuFeatureNEON; // NEON is always available on ARMv8 64bit. + features |= CpuFeatureNEON; // NEON is always available on ARMv8 64bit. # endif int auxv = qt_safe_open("/proc/self/auxv", O_RDONLY); if (auxv != -1) { @@ -151,17 +151,17 @@ static inline quint64 detectProcessorFeatures() # if defined(Q_PROCESSOR_ARM_V8) && defined(Q_PROCESSOR_ARM_64) // For Aarch64: if (vector[i+1] & HWCAP_CRC32) - features |= Q_UINT64_C(1) << CpuFeatureCRC32; + features |= CpuFeatureCRC32; # endif // Aarch32, or ARMv7 or before: if (vector[i+1] & HWCAP_NEON) - features |= Q_UINT64_C(1) << CpuFeatureNEON; + features |= CpuFeatureNEON; } # if defined(Q_PROCESSOR_ARM_32) // For Aarch32: if (vector[i] == AT_HWCAP2) { if (vector[i+1] & HWCAP2_CRC32) - features |= Q_UINT64_C(1) << CpuFeatureCRC32; + features |= CpuFeatureCRC32; } # endif } @@ -174,10 +174,10 @@ static inline quint64 detectProcessorFeatures() #endif #if defined(__ARM_NEON__) - features |= Q_UINT64_C(1) << CpuFeatureNEON; + features |= CpuFeatureNEON; #endif #if defined(__ARM_FEATURE_CRC32) - features |= Q_UINT64_C(1) << CpuFeatureCRC32; + features |= CpuFeatureCRC32; #endif return features; @@ -548,18 +548,18 @@ static inline quint64 detectProcessorFeatures() quint64 flags = 0; #if defined __mips_dsp - flags |= Q_UINT64_C(1) << CpuFeatureDSP; + flags |= CpuFeatureDSP; # if defined __mips_dsp_rev && __mips_dsp_rev >= 2 - flags |= Q_UINT64_C(1) << CpuFeatureDSPR2; + flags |= CpuFeatureDSPR2; # elif defined(Q_OS_LINUX) if (procCpuinfoContains("cpu model", "MIPS 74Kc") || procCpuinfoContains("cpu model", "MIPS 74Kf")) - flags |= Q_UINT64_C(1) << CpuFeatureDSPR2; + flags |= CpuFeatureDSPR2; # endif #elif defined(Q_OS_LINUX) if (procCpuinfoContains("ASEs implemented", "dsp")) { - flags |= Q_UINT64_C(1) << CpuFeatureDSP; + flags |= CpuFeatureDSP; if (procCpuinfoContains("cpu model", "MIPS 74Kc") || procCpuinfoContains("cpu model", "MIPS 74Kf")) - flags |= Q_UINT64_C(1) << CpuFeatureDSPR2; + flags |= CpuFeatureDSPR2; } #endif |