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authorRolland Dudemaine <rolland@ghs.com>2015-10-27 02:05:43 +0100
committerThiago Macieira <thiago.macieira@intel.com>2015-12-04 01:01:58 +0000
commitbb7deb69c806c7680125a2e7889345219047f5b4 (patch)
tree62e3398ed7eefb6be29247cca3eea01f62a3d07d /src/corelib
parentc0b912efd981410ceb76bc6192b0372f51027f57 (diff)
Add GHS toolchain architecture macros.
Change-Id: I4967451d52443a5f301b3706bcbbc2713ae70942 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'src/corelib')
-rw-r--r--src/corelib/global/qprocessordetection.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/corelib/global/qprocessordetection.h b/src/corelib/global/qprocessordetection.h
index 619c1dd544..f8c168e074 100644
--- a/src/corelib/global/qprocessordetection.h
+++ b/src/corelib/global/qprocessordetection.h
@@ -109,7 +109,8 @@
|| defined(__ARM_ARCH_7S__) \
|| defined(_ARM_ARCH_7) \
|| (defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM-0 >= 7) \
- || (defined(_M_ARM) && _M_ARM-0 >= 7)
+ || (defined(_M_ARM) && _M_ARM-0 >= 7) \
+ || (defined(__ARMv7__))
# define Q_PROCESSOR_ARM_V7
# define Q_PROCESSOR_ARM_V6
# define Q_PROCESSOR_ARM_V5
@@ -178,11 +179,11 @@
# if defined(_M_IX86)
# define Q_PROCESSOR_X86 (_M_IX86/100)
-# elif defined(__i686__) || defined(__athlon__) || defined(__SSE__)
+# elif defined(__i686__) || defined(__athlon__) || defined(__SSE__) || defined(__pentiumpro__)
# define Q_PROCESSOR_X86 6
-# elif defined(__i586__) || defined(__k6__)
+# elif defined(__i586__) || defined(__k6__) || defined(__pentium__)
# define Q_PROCESSOR_X86 5
-# elif defined(__i486__)
+# elif defined(__i486__) || defined(__80486__)
# define Q_PROCESSOR_X86 4
# else
# define Q_PROCESSOR_X86 3