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diff --git a/src/corelib/global/qprocessordetection.qdoc b/src/corelib/global/qprocessordetection.qdoc new file mode 100644 index 0000000000..e6605fb9b9 --- /dev/null +++ b/src/corelib/global/qprocessordetection.qdoc @@ -0,0 +1,448 @@ +// Copyright (C) 2022 The Qt Company Ltd. +// SPDX-License-Identifier: LicenseRef-Qt-Commercial OR GFDL-1.3-no-invariants-only + +/*! + \headerfile <QtProcessorDetection> + \inmodule QtCore + \title Architecture-specific Macro Definitions + \ingroup funclists + + \brief The <QtProcessorDetection> header file includes various + architecture-specific macros. + + The <QtProcessorDetection> header file declares a range of macros + (Q_PROCESSOR_*) that are defined if the application is compiled for + specified processor architectures. For example, the Q_PROCESSOR_X86 macro is + defined if the application is compiled for x86 processors. + + The purpose of these macros is to enable programmers to add + architecture-specific code to their application. +*/ + +/*! + \macro Q_PROCESSOR_ALPHA + \relates <QtProcessorDetection> + + Defined if the application is compiled for Alpha processors. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_ARM + \relates <QtProcessorDetection> + + Defined if the application is compiled for ARM processors. Qt currently + supports three optional ARM revisions: \l Q_PROCESSOR_ARM_V5, \l + Q_PROCESSOR_ARM_V6, and \l Q_PROCESSOR_ARM_V7. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_ARM_V5 + \relates <QtProcessorDetection> + + Defined if the application is compiled for ARMv5 processors. The \l + Q_PROCESSOR_ARM macro is also defined when Q_PROCESSOR_ARM_V5 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_ARM_V6 + \relates <QtProcessorDetection> + + Defined if the application is compiled for ARMv6 processors. The \l + Q_PROCESSOR_ARM and \l Q_PROCESSOR_ARM_V5 macros are also defined when + Q_PROCESSOR_ARM_V6 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_ARM_V7 + \relates <QtProcessorDetection> + + Defined if the application is compiled for ARMv7 processors. The \l + Q_PROCESSOR_ARM, \l Q_PROCESSOR_ARM_V5, and \l Q_PROCESSOR_ARM_V6 macros + are also defined when Q_PROCESSOR_ARM_V7 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_AVR32 + \relates <QtProcessorDetection> + + Defined if the application is compiled for AVR32 processors. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_BLACKFIN + \relates <QtProcessorDetection> + + Defined if the application is compiled for Blackfin processors. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_HPPA + \relates <QtProcessorDetection> + + Defined if the application is compiled for PA-RISC processors. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_IA64 + \relates <QtProcessorDetection> + + Defined if the application is compiled for IA-64 processors. This includes + all Itanium and Itanium 2 processors. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_LOONGARCH + \relates <QtProcessorDetection> + \since 6.5 + + Defined if the application is compiled for LoongArch processors. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_LOONGARCH_32 + \relates <QtProcessorDetection> + \since 6.5 + + Defined if the application is compiled for 32-bit LoongArch processors. + The \l Q_PROCESSOR_LOONGARCH macro is also defined when + Q_PROCESSOR_LOONGARCH_32 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_LOONGARCH_64 + \relates <QtProcessorDetection> + \since 6.5 + + Defined if the application is compiled for 64-bit LoongArch processors. + The \l Q_PROCESSOR_LOONGARCH macro is also defined when + Q_PROCESSOR_LOONGARCH_64 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_M68K + \relates <QtProcessorDetection> + + Defined if the application is compiled for Motorola 68000 processors. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_MIPS + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS processors. Qt currently + supports seven MIPS revisions: \l Q_PROCESSOR_MIPS_I, \l + Q_PROCESSOR_MIPS_II, \l Q_PROCESSOR_MIPS_III, \l Q_PROCESSOR_MIPS_IV, \l + Q_PROCESSOR_MIPS_V, \l Q_PROCESSOR_MIPS_32, and \l Q_PROCESSOR_MIPS_64. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_MIPS_I + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS-I processors. The \l + Q_PROCESSOR_MIPS macro is also defined when Q_PROCESSOR_MIPS_I is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_MIPS_II + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS-II processors. The \l + Q_PROCESSOR_MIPS and \l Q_PROCESSOR_MIPS_I macros are also defined when + Q_PROCESSOR_MIPS_II is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_MIPS_32 + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS32 processors. The \l + Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, and \l Q_PROCESSOR_MIPS_II macros + are also defined when Q_PROCESSOR_MIPS_32 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_MIPS_III + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS-III processors. The \l + Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, and \l Q_PROCESSOR_MIPS_II macros + are also defined when Q_PROCESSOR_MIPS_III is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_MIPS_IV + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS-IV processors. The \l + Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, \l Q_PROCESSOR_MIPS_II, and \l + Q_PROCESSOR_MIPS_III macros are also defined when Q_PROCESSOR_MIPS_IV is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_MIPS_V + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS-V processors. The \l + Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, \l Q_PROCESSOR_MIPS_II, \l + Q_PROCESSOR_MIPS_III, and \l Q_PROCESSOR_MIPS_IV macros are also defined + when Q_PROCESSOR_MIPS_V is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_MIPS_64 + \relates <QtProcessorDetection> + + Defined if the application is compiled for MIPS64 processors. The \l + Q_PROCESSOR_MIPS, \l Q_PROCESSOR_MIPS_I, \l Q_PROCESSOR_MIPS_II, \l + Q_PROCESSOR_MIPS_III, \l Q_PROCESSOR_MIPS_IV, and \l Q_PROCESSOR_MIPS_V + macros are also defined when Q_PROCESSOR_MIPS_64 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_POWER + \relates <QtProcessorDetection> + + Defined if the application is compiled for POWER processors. Qt currently + supports two Power variants: \l Q_PROCESSOR_POWER_32 and \l + Q_PROCESSOR_POWER_64. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_POWER_32 + \relates <QtProcessorDetection> + + Defined if the application is compiled for 32-bit Power processors. The \l + Q_PROCESSOR_POWER macro is also defined when Q_PROCESSOR_POWER_32 is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_POWER_64 + \relates <QtProcessorDetection> + + Defined if the application is compiled for 64-bit Power processors. The \l + Q_PROCESSOR_POWER macro is also defined when Q_PROCESSOR_POWER_64 is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_RISCV + \relates <QtProcessorDetection> + \since 5.13 + + Defined if the application is compiled for RISC-V processors. Qt currently + supports two RISC-V variants: \l Q_PROCESSOR_RISCV_32 and \l + Q_PROCESSOR_RISCV_64. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_RISCV_32 + \relates <QtProcessorDetection> + \since 5.13 + + Defined if the application is compiled for 32-bit RISC-V processors. The \l + Q_PROCESSOR_RISCV macro is also defined when Q_PROCESSOR_RISCV_32 is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_RISCV_64 + \relates <QtProcessorDetection> + \since 5.13 + + Defined if the application is compiled for 64-bit RISC-V processors. The \l + Q_PROCESSOR_RISCV macro is also defined when Q_PROCESSOR_RISCV_64 is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_S390 + \relates <QtProcessorDetection> + + Defined if the application is compiled for S/390 processors. Qt supports + one optional variant of S/390: Q_PROCESSOR_S390_X. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_S390_X + \relates <QtProcessorDetection> + + Defined if the application is compiled for S/390x processors. The \l + Q_PROCESSOR_S390 macro is also defined when Q_PROCESSOR_S390_X is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_SH + \relates <QtProcessorDetection> + + Defined if the application is compiled for SuperH processors. Qt currently + supports one SuperH revision: \l Q_PROCESSOR_SH_4A. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_SH_4A + \relates <QtProcessorDetection> + + Defined if the application is compiled for SuperH 4A processors. The \l + Q_PROCESSOR_SH macro is also defined when Q_PROCESSOR_SH_4A is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_SPARC + \relates <QtProcessorDetection> + + Defined if the application is compiled for SPARC processors. Qt currently + supports one optional SPARC revision: \l Q_PROCESSOR_SPARC_V9. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_SPARC_V9 + \relates <QtProcessorDetection> + + Defined if the application is compiled for SPARC V9 processors. The \l + Q_PROCESSOR_SPARC macro is also defined when Q_PROCESSOR_SPARC_V9 is + defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_PROCESSOR_X86 + \relates <QtProcessorDetection> + + Defined if the application is compiled for x86 processors. Qt currently + supports two x86 variants: \l Q_PROCESSOR_X86_32 and \l Q_PROCESSOR_X86_64. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_X86_32 + \relates <QtProcessorDetection> + + Defined if the application is compiled for 32-bit x86 processors. This + includes all i386, i486, i586, and i686 processors. The \l Q_PROCESSOR_X86 + macro is also defined when Q_PROCESSOR_X86_32 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ +/*! + \macro Q_PROCESSOR_X86_64 + \relates <QtProcessorDetection> + + Defined if the application is compiled for 64-bit x86 processors. This + includes all AMD64, Intel 64, and other x86_64/x64 processors. The \l + Q_PROCESSOR_X86 macro is also defined when Q_PROCESSOR_X86_64 is defined. + + \sa QSysInfo::buildCpuArchitecture() +*/ + +/*! + \macro Q_BYTE_ORDER + \relates <QtProcessorDetection> + + This macro can be used to determine the byte order your system + uses for storing data in memory. i.e., whether your system is + little-endian or big-endian. It is set by Qt to one of the macros + Q_LITTLE_ENDIAN or Q_BIG_ENDIAN. You normally won't need to worry + about endian-ness, but you might, for example if you need to know + which byte of an integer or UTF-16 character is stored in the + lowest address. Endian-ness is important in networking, where + computers with different values for Q_BYTE_ORDER must pass data + back and forth. + + Use this macro as in the following examples. + + \snippet code/src_corelib_global_qglobal.cpp 40 + + \sa Q_BIG_ENDIAN, Q_LITTLE_ENDIAN +*/ + +/*! + \macro Q_LITTLE_ENDIAN + \relates <QtProcessorDetection> + + This macro represents a value you can compare to the macro + Q_BYTE_ORDER to determine the endian-ness of your system. In a + little-endian system, the least significant byte is stored at the + lowest address. The other bytes follow in increasing order of + significance. + + \snippet code/src_corelib_global_qglobal.cpp 41 + + \sa Q_BYTE_ORDER, Q_BIG_ENDIAN +*/ + +/*! + \macro Q_BIG_ENDIAN + \relates <QtProcessorDetection> + + This macro represents a value you can compare to the macro + Q_BYTE_ORDER to determine the endian-ness of your system. In a + big-endian system, the most significant byte is stored at the + lowest address. The other bytes follow in decreasing order of + significance. + + \snippet code/src_corelib_global_qglobal.cpp 42 + + \sa Q_BYTE_ORDER, Q_LITTLE_ENDIAN +*/ + +/*! + \macro QT_POINTER_SIZE + \relates <QtProcessorDetection> + + Expands to the size of a pointer in bytes (4 or 8). This is + equivalent to \c sizeof(void *) but can be used in a preprocessor + directive. +*/ |