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* Update copyright headersJani Heikkinen2015-02-111-6/+6
| | | | | | | | | | | | | | | | | | Qt copyrights are now in The Qt Company, so we could update the source code headers accordingly. In the same go we should also fix the links to point to qt.io. Outdated header.LGPL removed (use header.LGPL21 instead) Old header.LGPL3 renamed to header.LGPL3-COMM to match actual licensing combination. New header.LGPL-COMM taken in the use file which were using old header.LGPL3 (src/plugins/platforms/android/extract.cpp) Added new header.LGPL3 containing Commercial + LGPLv3 + GPLv2 license combination Change-Id: I6f49b819a8a20cc4f88b794a8f6726d975e8ffbe Reviewed-by: Matti Paaso <matti.paaso@theqtcompany.com>
* Update license headers and add new license filesMatti Paaso2014-09-241-18/+10
| | | | | | | | | - Renamed LICENSE.LGPL to LICENSE.LGPLv21 - Added LICENSE.LGPLv3 - Removed LICENSE.GPL Change-Id: Iec3406e3eb3f133be549092015cefe33d259a3f2 Reviewed-by: Iikka Eklund <iikka.eklund@digia.com>
* Add a testAndSet overload to the atomics that returns the current valueThiago Macieira2014-02-161-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is extremely useful, since the most common action after a failed compare-and-swap is to loop around, trying again with the current value as found in memory. Code currently written as: do { Type value = atomic.load(); ... } while (!atomic.testAndSetRelaxed(value, desired)); Becomes: Type value = atomic.load(); do { ... } while (!atomic.testAndSetRelaxed(value, desired, value)); In most CPU architectures, the value that was found in memory is known to the compare-and-swap code, so this is more efficient than the previous code. In architectures where the value is not known, the new code is no worse than before. The implementation sometimes modified an existing function, sometimes it added a new one, depending on whether more registers were needed in the assembly (like ARMv6-7), the code became more complex (ARMv5), the optimizer failed (C++11), or it was just plain equivalent (MIPS). Change-Id: I7d6d200ea9746ec8978a0c1e1969dbc3580b9285 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Replace the type-based QAtomicIntegerTraits with a size-based oneThiago Macieira2014-01-301-2/+1
| | | | | | | | This simplifies the code a lot and avoids silly mistakes where a specific integer type is missing (such as char16_t). Change-Id: Id91dfd1919e783e0a9af7bfa093ca560a01b22d1 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Centralize support for QBasicAtomic for ints and longsThiago Macieira2014-01-301-6/+0
| | | | | | | No need to redefine everywhere, since they're required to be supported. Change-Id: I2bdbbd0b0c44871e3bd0edcf0289fc58dd50ff31 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Ensure that the pointer-sized QAtomicInteger specialization existsThiago Macieira2014-01-301-0/+10
| | | | | | | | | | | | | | | | | | | This is already implemented in qatomic_x86.h, qatomic_ia64.h, qatomic_mips.h, qatomic_armv6.h, and qatomic_cxx11.h. For qatomic_msvc.h, we've just fixed it. For qatomic_gcc.h, we know that the compiler supports it, so just add it. According to the GCC manual, it might print a warning on some platforms, so we only enable that on 64-bit builds. For qatomic_unix.h, the support was missing (along with support for unsigned 32-bit), so this commits adds it. For qatomic_armv5.h, the platform does not always support 64-bit atomics, but ARMv5 cannot compile in 64-bit mode anyway. Change-Id: Ia8b3b5c641f11e5df05937fe7442be0a223174ef Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Fix the C++11 and GCC-atomic intrinsics when not using GCCThiago Macieira2013-09-171-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both Clang and ICC complain about the use of those atomics when used with a forward-declared pointee. GCC doesn't, which makes me think it's a GCC bug. When using QBasicAtomicPointer<Foo> with these atomics, the _q_value member causes the instantiation of QAtomicOps<Foo>, which causes the instantiation of the regular member function QAtomicOps<Foo>::fetchAndAddRelaxed. The problem is that function takes a QAtomicAdditiveType<Foo>::AdditiveT as parameter, which requires sizeof(Foo). Clang 3.3 and ICC 14 correctly expand and complain. GCC 4.7-4.9 apparently don't. The fix is to apply the same trick we used for the other atomics: change all ops functions (including fetchAndAddRelaxed) to be member templates. That way, they can't be expanded until the actual use. Clang errors: qgenericatomic.h:73:33: error: invalid application of 'sizeof' to an incomplete type 'QMutexData' qatomic_gcc.h:136:48: note: in instantiation of template class 'QAtomicAdditiveType<QMutexData *>' requested here qbasicatomic.h:272:22: note: in instantiation of template class 'QAtomicOps<QMutexData *>' requested here ICC errors: qgenericatomic.h(73): error: incomplete type is not allowed detected during: instantiation of class "QAtomicAdditiveType<T *> [with T=QMutexData]" at line 111 of "qatomic_cxx11.h" instantiation of class "QAtomicOps<T> [with T=QMutexData *]" at line 272 of "qbasicatomic.h" Found-by: Tor Arne Change-Id: I9b10648cd47109a943b34a4c9926d77cd0c4fe12 Reviewed-by: Tor Arne Vestbø <tor.arne.vestbo@digia.com> Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
* Mark all qtbase headers that aren't cleanThiago Macieira2013-03-031-0/+1
| | | | | | | | | | | | | | | | QtCore has a few headers that, though public, aren't meant to be included directly. Those are the atomic headers, the three _impl.h headers and qt_windows.h. QtGui includes two OpenGL headers that don't compile on their own. Other libraries should not have headers like that (but they do, something we need to fix eventually). Change-Id: I55e4eb057748f47df927ee618f9409acbc189cc1 Reviewed-by: Sean Harmer <sean.harmer@kdab.com> Reviewed-by: Gunnar Sletta <gunnar.sletta@digia.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Remove QT_{BEGIN,END}_HEADER macro usageSergio Ahumada2013-01-291-5/+0
| | | | | | | | | | | The macro was made empty in ba3dc5f3b56d1fab6fe37fe7ae08096d7dc68bcb and is no longer necessary or used. Discussed-on: http://lists.qt-project.org/pipermail/development/2013-January/009284.html Change-Id: Id2bb2e2cabde059305d4af5f12593344ba30f001 Reviewed-by: Laszlo Papp <lpapp@kde.org> Reviewed-by: Jędrzej Nowacki <jedrzej.nowacki@digia.com> Reviewed-by: hjk <hjk121@nokiamail.com>
* Change copyrights from Nokia to DigiaIikka Eklund2012-09-221-23/+23
| | | | | | | | Change copyrights and license headers from Nokia to Digia Change-Id: If1cc974286d29fd01ec6c19dd4719a67f4c3f00e Reviewed-by: Lars Knoll <lars.knoll@digia.com> Reviewed-by: Sergio Ahumada <sergio.ahumada@digia.com>
* Enable QAtomicInteger for char16_t and char32_tThiago Macieira2012-08-181-0/+3
| | | | | | | | | | | Those are regular, integer types, of 16- and 32-bit width, respectively. C++11's std::atomic supports them, so we should too. C++11 also supports wchar_t, but since that type's size can change, I don't feel like support for it in Qt is pressing. Change-Id: I945b641c91a8a98be82715f878c382dee58ac98b Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
* Add Q_DECL_CONSTEXPR to the isXXX functions in the new atomics.Thiago Macieira2012-08-181-2/+2
| | | | | | | | | This allows one to write code that depends on these values at compile-time. Change-Id: I7d78524ed9c70d4141360496d1d764dcbfa92e62 Reviewed-by: Marc Mutz <marc.mutz@kdab.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Mark all atomic functions as Q_DECL_NOTHROWThiago Macieira2012-08-091-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Actually, only the "new" atomics are marked. The old implementation, based on qoldbasicatomic.h is unchanged, but should still work without a problem. The following configurations were tested and do work: - x86 64-bit - x86 32-bit - generic GCC - generic C++11 std::atomic - bootstrap - ARMv6 and 7 - MIPS - MSVC 2010 32-bit - MSVC 2010 64-bit The only two configurations untested are IA-64 and ARMv5. Except for MSVC, all configurations were tested with GCC 4.6 (MIPS and ARM) and 4.7 (x86 and generics). Change-Id: Iecbfeacd9d20b535453e91335165e9a221e0b47e Reviewed-by: Marc Mutz <marc.mutz@kdab.com> Reviewed-by: Lars Knoll <lars.knoll@nokia.com>
* Make loadAcquire const.Stephen Kelly2012-02-291-1/+1
| | | | | Change-Id: Iad2d60d1abe363a3b85eaf152861d0979a997d81 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Silence syncqt warnings for atomic implementation headersBradley T. Hughes2012-02-061-0/+4
| | | | | | | | | | Most of these headers are either forwarding headers, or we explicitly stop syncqt so that it doesn't generate class includes for the atomic implementation. Either way, syncqt doesn't see the QT_END_* (and sometimes not QT_BEGIN_*), which this commit fixes. Change-Id: Icc8da6f384f38b1ff4eb265c731ce2f2ed92a1a3 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Remove "All rights reserved" line from license headers.Jason McDonald2012-01-301-0/+1
| | | | | | | | | | As in the past, to avoid rewriting various autotests that contain line-number information, an extra blank line has been inserted at the end of the license text to ensure that this commit does not change the total number of lines in the license header. Change-Id: I311e001373776812699d6efc045b5f742890c689 Reviewed-by: Rohan McGovern <rohan.mcgovern@nokia.com>
* Add a set of atomics based on GCC intrinsicsThiago Macieira2012-01-281-0/+129
With this implementation, we can have Qt run on any architecture that GCC supports without having to write specialised code. However, on some architectures, the code that GCC generates is not optimal: it uses locking on ARMv5 and it's always fully-ordered. For that reason, it appears after the Qt native assembly implementations (it's a fallback, not an override). Since they all have fully-ordered memory semantics, we define only the xxxRelaxed functions. The exception is __sync_lock_and_test, which has acquire semantics, so we need to define the Release and Ordered versions too. On some architectures, GCC can support atomics on types different than 32-bit and pointer-sized (like x86, x86-64, ARM and even MIPS). However, there's no standardised way of telling: GCC seems to define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8} if those operations are present, but I couldn't find it on the ARM compiler (it was there for i386, x86-64, IA-64 and MIPS). Change-Id: I55ff7a7c0cfc6388b7ad8e2c0dedecffdf2a3e01 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Olivier Goffart <ogoffart@woboq.com>