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* Bypass a bug in gcc 4.7 for QAtomicTraits::isLockFree()Alexander Volkov2016-08-231-13/+13
| | | | | | | | | | | | | | | It's not possible to build Qt with gcc 4.7 since aca0e367be9cdc3b48f09200f4eadbcfe5a574c8 because of the bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53473 that doesn't allow to specialize static members declared both as constexpr and noexcept. That commit was made after 5.7.0 and it introduced QAtomicTraits::isLockFree() with these specifiers. Remove the noexcept specifier to fix building. Change-Id: Ifc2462c90de1180f1e015fdc0646f246d33e68b0 Reviewed-by: Marc Mutz <marc.mutz@kdab.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix the Q_ATOMIC_xxx_IS_www_NATIVE macros with C++11Thiago Macieira2016-07-131-31/+156
| | | | | | | | | | | | | | | When I introduced this code in Qt 5.0, I made INT and POINTER be SOMETIMES_NATIVE, but then later I made the specific sizes be ALWAYS_NATIVE. That doesn't make sense. Instead, use the macros from the C++11 <atomic> header. Note that the member isXxxxNative() functions should not have been constexpr. That's a defect I introduced in Qt 5.0. Task-number: QTBUG-51315 Change-Id: I0c94a5c2846b48c8aea7ffff1436013e8686c153 Reviewed-by: Lars Knoll <lars.knoll@qt.io>
* Merge remote-tracking branch 'origin/5.6' into 5.7Liang Qi2016-02-241-4/+4
|\ | | | | | | | | | | | | | | | | | | | | Conflicts: src/android/jar/src/org/qtproject/qt5/android/QtActivityDelegate.java src/plugins/platforms/windows/qwindowsfontengine.cpp src/plugins/platforms/windows/qwindowsnativeimage.cpp tests/auto/gui/kernel/qwindow/BLACKLIST tests/auto/gui/kernel/qwindow/tst_qwindow.cpp Change-Id: I649b32b260ce0ed2d6a5089021daa0d6a8db85f7
| * Make public headers compile with -Wzero-as-null-pointer-constantMarc Mutz2016-02-191-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | ... or similar. This amends previous commits that converted the majority of cases. Task-number: QTBUG-45291 Change-Id: I219cdeddca7063a56efeb4fee0e5bb2cbdc7732b Reviewed-by: Lars Knoll <lars.knoll@theqtcompany.com> Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com>
* | Add Intel copyright to files that Intel has had non-trivial contributionThiago Macieira2016-01-212-0/+2
| | | | | | | | | | | | | | | | | | I wrote a script to help find the files, but I reviewed the contributions manually to be sure I wasn't claiming copyright for search & replace, adding Q_DECL_NOTHROW or adding "We mean it" headers. Change-Id: I7a9e11d7b64a4cc78e24ffff142b506368fc8842 Reviewed-by: Lars Knoll <lars.knoll@theqtcompany.com>
* | Remove all the atomic code besides MSVC and std::atomicThiago Macieira2016-01-1913-3573/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [ChangeLog][Important Behavior Changes] Starting with Qt 5.7, Qt requires a C++11 compiler with support for C++11 atomics. This affects user code too: Qt headers no longer compile with a C++98 compiler. The minimum compiler versions for this release are: * Clang 3.4 (found in XCode 5.1) * GCC 4.7 * Microsoft Visual Studio 2012 Change-Id: Ib056b47dde3341ef9a52ffff13ef1f496ea9363f Reviewed-by: Marc Mutz <marc.mutz@kdab.com> Reviewed-by: Dmitry Shachnev <mitya57@gmail.com>
* | Updated license headersJani Heikkinen2016-01-1514-194/+278
|/ | | | | | | | | | | From Qt 5.7 -> LGPL v2.1 isn't an option anymore, see http://blog.qt.io/blog/2016/01/13/new-agreement-with-the-kde-free-qt-foundation/ Updated license headers to use new LGPL header instead of LGPL21 one (in those files which will be under LGPL v3) Change-Id: I046ec3e47b1876cd7b4b0353a576b352e3a946d9 Reviewed-by: Lars Knoll <lars.knoll@theqtcompany.com>
* Merge remote-tracking branch 'origin/5.5' into 5.6Liang Qi2015-11-271-1/+0
|\ | | | | | | | | | | | | | | | | | | Conflicts: src/network/socket/qnativesocketengine_p.h src/network/ssl/qsslsocket_mac.cpp src/network/ssl/qsslsocket_mac_p.h src/widgets/kernel/qwidget.cpp Change-Id: I39592cb37d710dfaf8640769ba3c1b637927d7f4
| * Remove arch/qatomic_mips.h from src/corelib/arch/arch.pri.Friedemann Kleint2015-11-241-1/+0
| | | | | | | | | | | | | | | | | | | | Amend change 110a8c339fa078a4edd09a70239280e482b149f1, fixing: WARNING: Failure to find: arch/qatomic_mips.h Task-number: QTBUG-49168 Change-Id: I7009037d3f4c51c9ed9713b6e94ee43022fe2645 Reviewed-by: Dmitry Shachnev <mitya57@gmail.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* | Merge remote-tracking branch 'origin/5.5' into 5.6Liang Qi2015-11-171-351/+0
|\| | | | | | | Change-Id: I6b1fe0c6c360a0d5285911869f0f4f93d86d822e
| * Remove qatomic_mips.h: the 3-operand testAndSet is brokenThiago Macieira2015-11-051-351/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "previous" value is always 1 when the compare-and-swap succeeded, instead of the previous value. Instead of fixing this, let's just remove this file a bit earlier than the rest. All of them will be removed in Qt 5.7 anyway, so let's leave MIPS atomics to the compiler. Task-number: QTBUG-49168 Change-Id: Idba8c29717f34c70a58fffff14133304595165f5 Reviewed-by: Dmitry Shachnev <mitya57@gmail.com> Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Marc Mutz <marc.mutz@kdab.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Lisandro Damián Nicanor Pérez Meyer <perezmeyer@gmail.com>
* | Merge remote-tracking branch 'origin/5.5' into 5.6Liang Qi2015-10-021-4/+4
|\| | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: qmake/doc/src/qmake-manual.qdoc src/corelib/tools/qstring.h src/gui/image/qimagereader.cpp src/network/access/qnetworkaccessmanager.cpp src/tools/qdoc/doc/examples/examples.qdoc src/widgets/accessible/qaccessiblewidgetfactory_p.h src/widgets/doc/qtwidgets.qdocconf Change-Id: I8fae62283aebefe24e5ca4b4abd97386560c0fcb
| * Fixed compilation errors in qatomic_ia64.hÉmeric MASCHINO2015-09-121-4/+4
| | | | | | | | | | | | | | | | | | | | | | QBasicAtomicOps<size>::testAndSetRelaxed(T &, T, T) and QBasicAtomicOps<size>::testAndSetOrdered(T &, T, T) bodies don't match any prototypes in qatomic_ia64.h: the optional parameter T *currentValue is missing. Task-number: QTBUG-48197 Change-Id: I0112c429b161b4a0ddb6e8a0400a436282ffb1c7 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* | Auto-detect whether 64-bit std::atomic really worksThiago Macieira2015-09-222-5/+9
|/ | | | | | | | | | | | | | | | | | | | | | | | | The C++ standard says it must, but some badly-configured toolchains seem to be lacking support. In particular, for some 32-bit platforms without native support for them, GCC implements 64-bit atomics via out-of-line functions in libatomic. If that library is missing... well, then std::atomic 64-bit doesn't work and we mustn't try to use it. This was found when trying to compile Qt 5.6 for MIPS 32-bit: Linking library libQt5Core.so.5.6.0 .obj/qsimd.o: In function `std::__atomic_base<unsigned long long>::load(std::memory_order) const': /opt/poky/1.7/sysroots/mips32r2-poky-linux/usr/include/c++/4.9.1/bits/atomic_base.h:500: undefined reference to `__atomic_load_8' .obj/qsimd.o: In function `std::__atomic_base<unsigned long long>::store(unsigned long long, std::memory_order)': /opt/poky/1.7/sysroots/mips32r2-poky-linux/usr/include/c++/4.9.1/bits/atomic_base.h:478: undefined reference to `__atomic_store_8' Yocto bug report: https://bugzilla.yoctoproject.org/show_bug.cgi?id=8274 Change-Id: I42e7ef1a481840699a8dffff140224d6614e5c36 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Lars Knoll <lars.knoll@theqtcompany.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix Q_BASIC_ATOMIC_INITIALIZER for std::atomicThiago Macieira2015-07-201-3/+3
| | | | | | | | | | | | | | | | | We can't have too many braces: one pair is just enough because we're actually calling the QBasicAtomicInt's constructor. That is, we're using the uniform initialization procedure. Required for Clang 3.7: qmetatype.h:1772:46: error: braces around scalar initializer [-Werror,-Wbraced-scalar-init] static QBasicAtomicInt metatype_id = Q_BASIC_ATOMIC_INITIALIZER(0); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ qatomic_cxx11.h:331:43: note: expanded from macro 'Q_BASIC_ATOMIC_INITIALIZER' #define Q_BASIC_ATOMIC_INITIALIZER(a) { {a} } ^~~ Change-Id: Ib306f8f647014b399b87ffff13f1f2db1fabe393 Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com>
* Fix alignment of 64-bit atomics on iOSThiago Macieira2015-07-151-1/+4
| | | | | | | | | | | The ldrexd and strexd instructions require 64-bit alignment, but Clang for iOS aligns those types on 32-bit boundaries inside structures. We can't use Q_ALIGNOF because it returns the alignment for the type inside a structure. Task-number: QTBUG-46949 Change-Id: Ib056b47dde3341ef9a52ffff13ef17bede0846f2 Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com>
* Add missing fetchAndXxx methods to atomic classes based on std::atomicThiago Macieira2015-03-051-0/+96
| | | | | | | | And add tests for the GCC intrinsics and for std::atomic. Task-number: QTBUG-43794 Change-Id: Ic5d393bfd36e48a193fcffff13b9b2dbaee80469 Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com>
* Remove __cdecl from Windows desktop atomicsThiago Macieira2015-02-201-1/+1
| | | | | | | | | | | | | | winbase.h defines them without __cdecl, so we shouldn't add them ourselves to our forward declaration. Doing so results in errors if the user changed the default calling convention when compiling Qt: qatomic_msvc.h(126): error C2373: '_InterlockedIncrement' : redefinition; different type modifiers C:\Program Files (x86)\Microsoft Visual Studio 12.0\VC\include\intrin.h(242) : see declaration of '_InterlockedIncrement' Task-number: QTBUG-44028 Change-Id: I1a800c709d3543699131ffff13c3d09fe53ba28b Reviewed-by: Olivier Goffart (Woboq GmbH) <ogoffart@woboq.com> Reviewed-by: Marc Mutz <marc.mutz@kdab.com>
* Update copyright headersJani Heikkinen2015-02-1115-133/+117
| | | | | | | | | | | | | | | | | | Qt copyrights are now in The Qt Company, so we could update the source code headers accordingly. In the same go we should also fix the links to point to qt.io. Outdated header.LGPL removed (use header.LGPL21 instead) Old header.LGPL3 renamed to header.LGPL3-COMM to match actual licensing combination. New header.LGPL-COMM taken in the use file which were using old header.LGPL3 (src/plugins/platforms/android/extract.cpp) Added new header.LGPL3 containing Commercial + LGPLv3 + GPLv2 license combination Change-Id: I6f49b819a8a20cc4f88b794a8f6726d975e8ffbe Reviewed-by: Matti Paaso <matti.paaso@theqtcompany.com>
* Complete MIPS atomic support on pre-MIPS32 architecturesPino Toscano2014-12-301-1/+4
| | | | | | | | Extend the support for pre-MIPS32 architectures (done mostly in 60b6b28c213a420ee40e254ff1823876098e0a04) also to orderedMemoryFence. Change-Id: I50b9091c16166b8434a07988053c1f901d528237 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix compilation of MIPS with ClangThiago Macieira2014-10-071-1/+1
| | | | | | | | | | Clang always sets __mips to 1, unlike GCC. To detect a higher MIPS arch, we need to rely on the _MIPS_ARCH_MIPSxxx macros being defined -- or, in this case, _MIPS_ARCH_MIPS1 not being defined. Change-Id: Ib6846a6892a4c1e17e595a69305b7e46a5303ee7 Reviewed-by: Olivier Goffart <ogoffart@woboq.com> Reviewed-by: Adrian Perez de Castro <aperez@igalia.com>
* Update license headers and add new license filesMatti Paaso2014-09-2413-245/+141
| | | | | | | | | - Renamed LICENSE.LGPL to LICENSE.LGPLv21 - Added LICENSE.LGPLv3 - Removed LICENSE.GPL Change-Id: Iec3406e3eb3f133be549092015cefe33d259a3f2 Reviewed-by: Iikka Eklund <iikka.eklund@digia.com>
* Correct the SYNC hint for the release barrierThiago Macieira2014-08-131-1/+1
| | | | | | | | | | | | | The MIPS32 manual I have says 0x11 is SYNC_ACQUIRE and 0x12 is SYNC_RELEASE. The change was an unintentional mistake in commit 60b6b28c213a420ee40e254ff1823876098e0a04. Thanks to Spencer Schumann for spotting this. Change-Id: I16885e4e86e8befa8931733d0b5a54ac9942f176 Reviewed-by: Spencer Schumann <spencer.schumann@echostar.com> Reviewed-by: Olivier Goffart <ogoffart@woboq.com> Reviewed-by: Lisandro Damián Nicanor Pérez Meyer <perezmeyer@gmail.com>
* Merge remote-tracking branch 'origin/stable' into 5.3Oswald Buddenhagen2014-07-301-2/+8
|\ | | | | | | Change-Id: I2a044d44ca991ba20ddd710053b85afb51e362d3
| * Support MIPS atomic on pre-MIPS32 architecturesAurelien Jarno2014-06-271-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The atomic functions on MIPS are based on the sync opcode with an immediate argument, which is something introduced in the MIPS32 instruction set. This prevent to use Qt on pre-MIPS32 CPU, like the Loongson 2 CPU. However some of the pre-MIPS32 CPUs interprets the sync opcode with and immediate argument as a sync opcode without argument (which is a stronger ordering than with the argument), and for the others the kernel emulates it. It is therefore fine to use the current MIPS atomic functions on pre-MIPS32 CPU. This patch allows that by temporarily changing the instruction set to MIPS32 around the sync instruction, so that binutils doesn't choke on it. Change-Id: I9cc984bd55b5f172736ce9e638a6f4e271b79fe7 Reviewed-by: Lisandro Damián Nicanor Pérez Meyer <perezmeyer@gmail.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* | Make the fetchAndAddRelaxed function a member templateThiago Macieira2014-06-241-2/+2
| | | | | | | | | | | | | | | | | | | | This way, no compiler can instantiate it at class instantiation time. We don't want them to do it for T that are function pointers (sizeof functions is meaningless). Change-Id: I6d5044bd5d9ffd0d347f1f38ab33c64213730788 Reviewed-by: Olivier Goffart <ogoffart@woboq.com> Reviewed-by: David Faure <david.faure@kdab.com>
* | Fix data race on QLoggingCategory when using qDebug from multiple threadsDavid Faure2014-06-201-1/+3
|/ | | | | | | setEnabled() would race with isEnabled()/isDebugEnabled()/etc. Change-Id: I2004cba81d5417a634b97f5c2f98d3a4ab71770d Reviewed-by: David Faure <david.faure@kdab.com>
* Remove 'register' storage class specifier in armv6 atomicsTor Arne Vestbø2014-03-191-8/+8
| | | | | | | It is deprecated, and produces warnings on recent Clang versions. Change-Id: I83181dd12c06a600a2f0eafbd83fe6111cf7752c Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix ARM atomics for 8- and 16-bit typesThiago Macieira2014-02-271-10/+44
| | | | | | | | | | | This has apparently never worked for any negative value. That's because the compiler sign-extends the incoming expectedValue to fill the 32-bit register, instead of zero-extending it, and it also expects any returned values to also be sign-extended. Task-number: QTBUG-37031 Change-Id: I836eddba7b1acc56bb0ac1d41de7001d06255b9b Reviewed-by: Sergio Ahumada <sahumada@blackberry.com>
* Fix compilation on armv5Eskil Abrahamsen Blomfeldt2014-02-241-0/+14
| | | | | | | | | | | | | | | | | Two changes broke compilation on armv5, where we're currently not CI-testing: 634f82f1f1fda7983abf70b58e43c580b1f01df0 changed the signature in a function definition without changing its declaration, while it was actually intending to add this as a new overload. bfe0db6fbea6376dbe395af6d76995a54bbc3b49 added an #error condition without fixing compilation on armv5. I don't know if the fix is correct, but at least it compiles. Task-number: QTBUG-37034 Change-Id: If99142fafb9bd55afc20b17f8b3cce5ee0ffec13 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Add a testAndSet overload to the atomics that returns the current valueThiago Macieira2014-02-168-30/+236
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is extremely useful, since the most common action after a failed compare-and-swap is to loop around, trying again with the current value as found in memory. Code currently written as: do { Type value = atomic.load(); ... } while (!atomic.testAndSetRelaxed(value, desired)); Becomes: Type value = atomic.load(); do { ... } while (!atomic.testAndSetRelaxed(value, desired, value)); In most CPU architectures, the value that was found in memory is known to the compare-and-swap code, so this is more efficient than the previous code. In architectures where the value is not known, the new code is no worse than before. The implementation sometimes modified an existing function, sometimes it added a new one, depending on whether more registers were needed in the assembly (like ARMv6-7), the code became more complex (ARMv5), the optimizer failed (C++11), or it was just plain equivalent (MIPS). Change-Id: I7d6d200ea9746ec8978a0c1e1969dbc3580b9285 Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Replace the type-based QAtomicIntegerTraits with a size-based oneThiago Macieira2014-01-308-62/+16
| | | | | | | | This simplifies the code a lot and avoids silly mistakes where a specific integer type is missing (such as char16_t). Change-Id: Id91dfd1919e783e0a9af7bfa093ca560a01b22d1 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Centralize support for QBasicAtomic for ints and longsThiago Macieira2014-01-3010-59/+0
| | | | | | | No need to redefine everywhere, since they're required to be supported. Change-Id: I2bdbbd0b0c44871e3bd0edcf0289fc58dd50ff31 Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Ensure that the pointer-sized QAtomicInteger specialization existsThiago Macieira2014-01-303-0/+63
| | | | | | | | | | | | | | | | | | | This is already implemented in qatomic_x86.h, qatomic_ia64.h, qatomic_mips.h, qatomic_armv6.h, and qatomic_cxx11.h. For qatomic_msvc.h, we've just fixed it. For qatomic_gcc.h, we know that the compiler supports it, so just add it. According to the GCC manual, it might print a warning on some platforms, so we only enable that on 64-bit builds. For qatomic_unix.h, the support was missing (along with support for unsigned 32-bit), so this commits adds it. For qatomic_armv5.h, the platform does not always support 64-bit atomics, but ARMv5 cannot compile in 64-bit mode anyway. Change-Id: Ia8b3b5c641f11e5df05937fe7442be0a223174ef Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* Add support for 16- and 64-bit atomics with MSVCThiago Macieira2014-01-301-38/+151
| | | | | | | | | | MSVC provides the necessary functions / intrinsics for 16- and 64-bit operations. It has some support for 8-bit too, but the most important functions seem to be missing... Change-Id: I177b4eb2a2cf14d716b78c94f9d6a9b11aea1b84 Reviewed-by: Friedemann Kleint <Friedemann.Kleint@digia.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* expand tabs and related whitespace fixes in *.{cpp,h,qdoc}Oswald Buddenhagen2014-01-131-2/+2
| | | | | | | | the diff -w for this commit is empty. Started-by: Thiago Macieira <thiago.macieira@intel.com> Change-Id: I77bb84e71c63ce75e0709e5b94bee18e3ce6ab9e Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Remove all "old atomic" code from QtThiago Macieira2013-12-109-3536/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The new atomic code was introduced in Qt 5.0. The platforms that did not get ported were announced as deprecated in Qt 5.2. The code is now removed in Qt 5.3. The status for the platform/compiler/OS combinations affected is: * Linux with GCC or Clang: still compiles on all platforms (via qatomic_cxx11.h or qatomic_gcc.h) * INTEGRITY with Green Hills compiler: no longer compiles * Solaris on UltraSPARC, with Sun Studio: no longer compiles * AIX on POWER5 or 6, with IBM Visual Age: no longer compiles (probably did not compile Qt 5.0 either) * VxWorks in kernel mode: no longer compiles [ChangeLog][General] Support for the following platforms has been removed, due to lack of interest in updating support: INTEGRITY, VxWorks, Solaris on UltraSPARC (with the Sun Studio compiler suite), AIX on POWER processors (with IBM Visual Age compiler suite). Change-Id: I8a961385fd95011c016b2b1eec52034794dae3e1 Reviewed-by: Olivier Goffart <ogoffart@woboq.com> Reviewed-by: Konstantin Ritt <ritt.ks@gmail.com> Reviewed-by: Lars Knoll <lars.knoll@digia.com> Reviewed-by: Marc Mutz <marc.mutz@kdab.com>
* Add missing Q_ATOMIC_INT32_xxx definitions to qatomic_unix.hThiago Macieira2013-12-091-0/+4
| | | | | | | | | They're now required as per the documentation. They should have been present when this was created... Change-Id: If52bc91e942306ef0fa7b1b41b739d897c9a1ea1 Reviewed-by: Olivier Goffart <ogoffart@woboq.com> Reviewed-by: Marc Mutz <marc.mutz@kdab.com>
* Disable 64-bit atomics on 32-bit x86Thiago Macieira2013-12-071-1/+2
| | | | | | | | | | | | At least with GCC, the use of cmpxchg8b in inline assembly is unreliable. The instruction requires 5 registers to be used and sometimes GCC complains that it runs out of them. qatomic_x86.h:424:33: error: can’t find a register in class ‘GENERAL_REGS’ while reloading ‘asm’ qatomic_x86.h:424:33: error: ‘asm’ operand has impossible constraints Change-Id: Ie5414f3bccc6e559c7eec93beabe8663ab40271f Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
* qatomic_cxx11: fix fetchAndAdd*()Marc Mutz2013-09-211-8/+4
| | | | | | | | | | | | | | | | In qatomic_cxx11, the 'Type' is std::atomic<T>, whose fetch_add method, used in fetchAndAdd*(), already does the right thing for T* with sizeof(T) > 1. The code, however, applied 'AddScale' to the 'valueToAdd', thus becoming incompatible with normal pointer arithmetics. This is very apparent when one goes to the length of actually testing qatomic_cxx11 with tst_QAtomicPointer (which is non-trivial, since the -c++11 configure option currently doesn't have an effect on tests/auto). To fix, remove the AddScale factor. Change-Id: I7507203af3b7df31d8322b31a6a1a33ca847d224 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix the C++11 and GCC-atomic intrinsics when not using GCCThiago Macieira2013-09-172-38/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both Clang and ICC complain about the use of those atomics when used with a forward-declared pointee. GCC doesn't, which makes me think it's a GCC bug. When using QBasicAtomicPointer<Foo> with these atomics, the _q_value member causes the instantiation of QAtomicOps<Foo>, which causes the instantiation of the regular member function QAtomicOps<Foo>::fetchAndAddRelaxed. The problem is that function takes a QAtomicAdditiveType<Foo>::AdditiveT as parameter, which requires sizeof(Foo). Clang 3.3 and ICC 14 correctly expand and complain. GCC 4.7-4.9 apparently don't. The fix is to apply the same trick we used for the other atomics: change all ops functions (including fetchAndAddRelaxed) to be member templates. That way, they can't be expanded until the actual use. Clang errors: qgenericatomic.h:73:33: error: invalid application of 'sizeof' to an incomplete type 'QMutexData' qatomic_gcc.h:136:48: note: in instantiation of template class 'QAtomicAdditiveType<QMutexData *>' requested here qbasicatomic.h:272:22: note: in instantiation of template class 'QAtomicOps<QMutexData *>' requested here ICC errors: qgenericatomic.h(73): error: incomplete type is not allowed detected during: instantiation of class "QAtomicAdditiveType<T *> [with T=QMutexData]" at line 111 of "qatomic_cxx11.h" instantiation of class "QAtomicOps<T> [with T=QMutexData *]" at line 272 of "qbasicatomic.h" Found-by: Tor Arne Change-Id: I9b10648cd47109a943b34a4c9926d77cd0c4fe12 Reviewed-by: Tor Arne Vestbø <tor.arne.vestbo@digia.com> Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
* Remove use of 'register' from Qt.Stephen Kelly2013-06-177-165/+165
| | | | | | | | | | It is deprecated and clang is starting to warn about it. Patch mostly generated by clang itself, with some careful grep and sed for the platform-specific parts. Change-Id: I8058e6db0f1b41b33a9e8f17a712739159982450 Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Whitespace cleanup: remove trailing whitespaceAxel Waggershauser2013-03-163-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove all trailing whitespace from the following list of files: *.cpp *.h *.conf *.qdoc *.pro *.pri *.mm *.rc *.pl *.qps *.xpm *.txt *README excluding 3rdparty, test-data and auto generated code. Note A): the only non 3rdparty c++-files that still have trailing whitespace after this change are: * src/corelib/codecs/cp949codetbl_p.h * src/corelib/codecs/qjpunicode.cpp * src/corelib/codecs/qbig5codec.cpp * src/corelib/xml/qxmlstream_p.h * src/tools/qdoc/qmlparser/qqmljsgrammar.cpp * src/tools/uic/ui4.cpp * tests/auto/other/qtokenautomaton/tokenizers/* * tests/benchmarks/corelib/tools/qstring/data.cpp * util/lexgen/tokenizer.cpp Note B): in about 30 files some overlapping 'leading tab' and 'TAB character in non-leading whitespace' issues have been fixed to make the sanity bot happy. Plus some general ws-fixes here and there as asked for during review. Change-Id: Ia713113c34d82442d6ce4d93d8b1cf545075d11d Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@digia.com>
* Mark all qtbase headers that aren't cleanThiago Macieira2013-03-0319-0/+81
| | | | | | | | | | | | | | | | QtCore has a few headers that, though public, aren't meant to be included directly. Those are the atomic headers, the three _impl.h headers and qt_windows.h. QtGui includes two OpenGL headers that don't compile on their own. Other libraries should not have headers like that (but they do, something we need to fix eventually). Change-Id: I55e4eb057748f47df927ee618f9409acbc189cc1 Reviewed-by: Sean Harmer <sean.harmer@kdab.com> Reviewed-by: Gunnar Sletta <gunnar.sletta@digia.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
* Fix thumb armv5 atomicsBogDan Vatra2013-02-271-0/+8
| | | | | | Change-Id: Ie9f98e5f5a08908d9d99e04bdc95fd506cc4a51e Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Paul Olav Tvete <paul.tvete@digia.com>
* Remove QT_{BEGIN,END}_HEADER macro usageSergio Ahumada2013-01-2919-89/+0
| | | | | | | | | | | The macro was made empty in ba3dc5f3b56d1fab6fe37fe7ae08096d7dc68bcb and is no longer necessary or used. Discussed-on: http://lists.qt-project.org/pipermail/development/2013-January/009284.html Change-Id: Id2bb2e2cabde059305d4af5f12593344ba30f001 Reviewed-by: Laszlo Papp <lpapp@kde.org> Reviewed-by: Jędrzej Nowacki <jedrzej.nowacki@digia.com> Reviewed-by: hjk <hjk121@nokiamail.com>
* Merge "Merge remote-tracking branch 'origin/stable' into dev" into ↵Frederik Gladhorn2013-01-2321-21/+21
|\ | | | | | | refs/staging/dev
| * Update copyright year in Digia's license headersSergio Ahumada2013-01-1821-21/+21
| | | | | | | | | | Change-Id: Ic804938fc352291d011800d21e549c10acac66fb Reviewed-by: Lars Knoll <lars.knoll@digia.com>
* | VxWorks process (RTP) mode does not have taskLock/taskUnlock functionsPasi Petäjäjärvi2013-01-231-0/+5
|/ | | | | | | | | VxWorks does not support to globally lock and unlock the scheduler from process. In kernel mode (DKM) above functions disable preemption from requested task and such functionality does not exist for process. Change-Id: Id41eab4c1973e4181e82539d08707659e0780f99 Reviewed-by: Samuel Rødal <samuel.rodal@digia.com>
* Change copyrights from Nokia to DigiaIikka Eklund2012-09-2223-550/+550
| | | | | | | | Change copyrights and license headers from Nokia to Digia Change-Id: If1cc974286d29fd01ec6c19dd4719a67f4c3f00e Reviewed-by: Lars Knoll <lars.knoll@digia.com> Reviewed-by: Sergio Ahumada <sergio.ahumada@digia.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-23 18:23:19 +0000